Advanced Microprocessor Research Articles

A new course on superscalar and VLIW computer architectures for real-time image and video computing

A one-quarter electrical and computer engineering course on advanced microprocessors and real-time image/video computing algorithms is described in this paper. It is primarily aimed at graduate students who have some background in computer architecture, signal and image processing, and experience in low-level programming of microprocessors. The course is designed to teach students not only the advanced microprocessors with instruction-level parallelism, e.g., superscalar and very long instruction word (VLIW) computer architectures, but also how to analyze and efficiently map various image and video computing algorithms on these microprocessors. Emphasis is placed on laboratory and individual project work requiring an in-depth study, implementation, testing and verification, demanding intensive participation from both the students and instructor. It is continually updated and improved to reflect new technologies in this dynamically changing area and to incorporate student feedback. This course has been offered for four quarters at the University of Washington.

High-performance image computing with modern microprocessors

Various levels of parallelism have recently been introduced in advanced microprocessors to meet the demanding computing need in digital video processing and other multimedia applications. Because many imaging algorithms are easily parallelizable, these architectural features and their wide availability at low cost have become a powerful tool in tackling both existing and new imaging applications. At the lowest level, the subword parallelism is used in the new instructions aimed at processing multiple multimedia data simultaneously. Instruction-level parallelism including subword parallelism is realized in either very long instruction word or superscalar architectures, while on-chip and/or off-chip multiprocessing capability is available for easier multiprocessor system designs. One of the difficulties in maximizing the computing throughput via parallelism has been the level of programming in that to obtain the optimal performance, assembly-level programming has typically been required. We review the architectural features in several modern microprocessors such as TMS320C60, TM-1000, PowerPC 604, Pentium II, R10000, Alpha 21264, PA-RISC 8200, UltraSPARC-II, and TMS320C80. Various obstacles to obtaining the best performance from these microprocessors with high-level and assembly languages are discussed, and several approaches to overcome these difficulties in diverse imaging applications are presented. © 1998 John Wiley & Sons, Inc. Int J Imaging Syst Technol 9: 407–415, 1998

The strv 1 microsatellite semes: Exploiting the geosynchronous transfer orbit

Following 3 successful years in orbit, the UK Defence Evaluation and Research Agency's two Space Technology Research Vehicle microsatellites (STRV) 1 a&b will be followed by a second mission. STRV 1 c&d are now in construction for a planned launch in 1999. The new mission, which includes 22 experimental payloads and developmental spacecraft bus technologies from European, US and Canadian military, civil and commercial sponsors, exploits the Geosynchronous Transfer Orbit (GTO) to offer an affordable, working space research tool for both government and industry. The STRV 1 programme objective is to promote the enhancement of military and civil space communications, remote sensing and navigation capabilities at reduced cost and risk. Additional aims are to help industry to achieve commercial benefit from investment in emerging technologies and to develop the synergy between government, commercial and civilian space applications. The paper explains how STRV 1 exploits the variable altitude and high radiation environment of GTO to investigate the performance of emerging technologies and techniques. This includes the accelerated life testing of components and materials, such as infra-red detectors, advanced microprocessors and solar cell technologies, and the prototyping of new techniques to improve communications and spacecraft autonomy. Experiments include implementing a secure version of the Consultative Committee for Space Data Systems (CCSDS) packet telecommand and telemetry standards, further development of the Internet-based Space Communication Protocol Standards (SCPS) and evaluating the exploitation of the Global Positioning System (GPS) in geosynchronous orbit. The new mission also builds on and extends the comprehensive environmental monitoring achieved by STRV 1 a&b.

Advanced microprocessor test strategy and methodology

This paper describes the overall test methodology used in implementing the S/390® microprocessor and the associated L2 cache array in shared multiprocessor designs, the design-for-test implementations, and the test software used in creating the test patterns and in measuring test effectiveness. Microprocessor advances in architectural complexity, circuit density, cycle time, and technology-related issues, coupled with IBM's high requirements for quality, reliability, and diagnosability, have made it necessary to develop testing methods and attain quality levels that far exceed what others have approached.

Prototyping the M68060 for concurrent verification

For large designs such as advanced microprocessors, emulation prototyping eliminates costly respins and dramatically shortens time to market. A virtual silicon prototype can run trillions of verification vectors in only a few weeks, beating conventional software logic simulators by up to six orders of magnitude.

Photoresists for 193-nm lithography

Photolithography using 193-nm light appears to be a viable route for the extension of optical lithography to the dimensions required for the manufacture of 1Gb DRAM and advanced CMOS microprocessors with 180-140-nm minimum feature sizes. In this paper, we discuss the origin of resist technology for 193-nm lithography and the current status of 193-nm photoresists, focusing on single-layer resist materials. We emphasize the photoresist design approaches under investigation, compare these with deep-UV (DUV) (248-nm) resist design and materials, and consider possible future lithography processes employing 193-nm lithography. Research and development on 193-nm photoresists by the lithography group at the IBM Almaden Research Center is highlighted.

Analysis of snubber-clamped diode-string mixed voltage interface ESD protection network for advanced microprocessors

A novel snubber-clamped diode-string ESD protection circuit for mixed voltage interface microprocessor applications is described. Analytical models, circuit simulation, electrical characterization, ESD electrothermal simulation, and ESD test data, will be shown for shallow trench isolation (STI) and LOCOS CMOS technologies.

A database manager for cell based VLSI circuits

CELLMAN, an object-oriented database manager for cell-based VLSI circuits is presented. With m constraints and n cells in the working set, the tool is capable of finding matching cells in O( m In n) time which is a significant speed up from the conventional relational database systems. An effective and efficient object-oriented database schema is developed for the cell based design environment. Efficient objective functions are developed to guide the search process. For function queries, technologies for Boolean matching is proposed with a constant time complexity, i.e., independent of the size of library. Techniques are developed to find closest misses when no cell satisfies the constraints provided by circuit designers. The tool has a user-friendly interface and is capable to be used in various environments. In addition, CELLMAN has inherited all advantages of object-oriented systems, including high performance, easy maintenance, inheritance, data abstraction, and has laid down an important foundation for designing extremely complicated circuits and systems. In fact, currently CELLMAN is being used in designing Intel's most advanced microprocessors.

An advanced microprocessor course with a design component

The paper describes the structure of an advanced microprocessor course, given at the graduate level. Included in the discussion is the rationale for the specific processors taught, the depth of coverage, and a design component.

Intermetal dielectric deposition by electron cyclotron resonance chemical vapor deposition (ECR CVD)

Advanced microprocessor and logic devices require multiple levels of metal to interconnect the many transistors that form them. Three-, four-, and five level metallization schemes are in production. The insulating material between these layers must fill very narrow gaps, without voids or seams, with a high quality dielectric, and must allow for subsequent global planarization such as chemical mechanical polishing (CMP). These requirements can be met with ECR CVD of silicon dioxide. ECR deposits high quality SiO 2 dielectric in a single wafer process that fills gaps 0.3 μm and smaller at aspect ratios 3:1 and greater on 200 mm wafers. Its electrical, optical, and chemical properties approach those of thermal oxide.

Dynamic mechanical analysis ASTM/ISO

Dynamic mechanical analysis (DMA) is used to characterize the behavior of a variety of materials. The development of the methodology for conducting these tests is the responsibility of ASTM D20.10.15 on dynamic mechanical properties. Similar activities are conducted in ISO under the jurisdiction of subcommitte ♯2. The test methods being developed cover a broad range of responses (temperature, frequency, and time) as well as stress states (i.e., tensile, bending, shear, and compression). Instruments have been developed which have greatly simplified the measurement of dynamic mechanical properties. The use of advanced computers and microprocessors and improved computer programs, to properly digest this information, have increased the demand for more sophisticated test results. The ease of developing this test data has resulted in DMA being a requirement in material characterization and specifications. The demand of the global market for this information has increased the interest of both ASTM and ISO members to develop standardized test methods for conducting and reporting DMA test data.

Planarized Copper Multilevel Interconnections for ULSI Applications

As the degree of large-scale integration (LSI) increases, the area of a single transistor will diminish and the density of transistors will increase. Accordingly, technology for high-density wiring to interconnect the huge number of transistors is needed because transistors cannot perform any useful functions without interconnects and electrodes. For advanced microprocessor chips with a sub-half-micron design rule and at least four interconnect layers, the minimum width of the interconnects becomes less than 0.35 μm.Aluminum or an aluminum alloy is now generally used as the interconnect material in LSI circuits because the physical and chemical properties of aluminum are compatible with current LSI processing: Aluminum forms a thin protective oxide film that withstands various thermal processes; it has relatively low electrical resistivity and halide compounds with a relatively high vapor pressure which are suitable for reactive ion etching (RIE), and it is an inexpensive material. The reliability of aluminum interconnects, however, is a major concern for maintaining the total reliability of advanced LSI. Because of its relatively low melting point, aluminum as an interconnect material is susceptible to stress- and electromigration, which leads to open failure of the interconnect. It is well-known that these failure modes are accelerated by decreasing the width and thickness of the interconnects. Hence, use of aluminum interconnects may be limited for future sub-half-micron LSIs.

Instruction-level parallel processing: History, overview, and perspective

Instruction-level parallelism (ILP) is a family of processor and compiler design techniques that speed up execution by causing individual machine operations to execute in parallel. Although ILP has appeared in the highest performance uniprocessors for the past 30 years, the 1980s saw it become a much more significant force in computer design. Several systems were built and sold commercially, which pushed ILP far beyond where it had been before, both in terms of the amount of ILP offered and in the central role ILP played in the design of the system. By the end of the decade, advanced microprocessor design at all major CPU manufacturers had incorporated ILP, and new techniques for ILP had become a popular topic at academic conferences. This article provides an overview and historical perspective of the field of ILP and its development over the past three decades.

Simulating Microprocessor-Based Parallel Computers Using Processor Libraries

As the limits of sequential processing are being approached, the use of parallel architectures in the implementation of modern scientific computer systems grows in importance. The use of advanced and powerful microprocessors in these systems is a particularly effective approach. However, the costs associated with such systems make it critical to be able to forecast system behavior before an actual hardware proto type is constructed, in terms of such requirements as real-time performance, throughput, bandwidth, latency, reliability, availability, etc. Experience with the design and simulation of a new parallel computer is used as an example to illustrate a technique by which requirements can be accurately analyzed without the risk of premature hardware implementution. Using processor libraries, the complexities of the actual system are portrayed in the form of a software-based prototype system which provides significantly more accuracy than traditional simulation methods.

Safety Critical Systems: So What… ?

Safety critical systems contain advanced computer, microprocessor and software technologies to a degree of sophistication that is frequently beyond the understanding of many practising engineers. Many of these systems control the safe operation of everyday things such as anti-lock braking on cars, personnel lifts and trains, as well as industrial processes and fly-by-wire aircraft. This paper describes the nature, processes, standards and assessment methods currently being employed with safety critical systems, and addresses various questions that the practising engineer may ask. It demonstrates that although the technology and methods may he novel, concerns surrounding the evaluation of safety critical systems are yet another instance of the age-old dilemma involved in exercising engineering judgement.

An advanced laboratory for microprocessor interfacing and communication

An advanced microprocessor laboratory is presented, along with the corresponding set of experiments used for teaching a microprocessor interfacing and communication course in electrical and computer engineering. Six experiments are described, consisting of both hardware and software designs. Particular attention is given to the integrating of programmable peripheral components (such as parallel, serial, analog, and human interfaces) to microprocessors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Constructing replicated systems using processors with point-to-point communication links

Replicated processing with majority voting is a well known method of achieving fault tolerance. We consider the problem of constructing a distributed system composed of an arbitrarily large number of N-modular redundant (NMR) nodes, where each node itself is composed of N, N = 2m + 1 and m ≥ 1, processing and voting elements. Advanced microprocessors, such as Inmos Transputers, provide fast serial communication links for inter-processor communication, making it possible to construct large networks of processors. We describe how replicated processing with majority voting can be achieved for such processor networks. This paper will present the overall systems architecture, including voting and NMR synchronization algorithms specially developed to exploit fast point to point communication facilities.

Modern Alloy Analysis and Identification with a Portable X-ray Analyzer

AbstractThe combination of an improved resolution, gas proportional detector with advanced microprocessor technology provides a new and unique solution to the problem of alloy analysis.A field portable, microprocessor controlled, fully user-programmable x-ray analyser is described for fast, reliable, on-site, positive alloy identification and assay. The radio-isotope based analyser employs a modified Lueas-Tooth and Price model of intensity corrections for quantitative, multielement analysis. Applications are reviewed and include examples to show the superior performance of the instrument in such difficult eases as sulfur in carbon steels, and titanium and nickel in stainless steels.Discussion of the unique alloy identification scheme and its underlying principles is followed by examples of applications illustrating the capabilities of the instrument in distinguishing, in 5 seconds, alloys of closely similar compositions such as stainless steels 303, 304 and 321, and 410 and 416.

The high level language and operating system support features of advanced microprocessors Part II: Operating system support features

Advanced microprocessors like the Intel iAPX386, the Motorola MC68020, the National Semiconductor NS32032, and the Zilog Z8000 have been designed with the support of high level languages and operating systems in mind. High-level language support features have been discussed in Part I, this paper will examine the architectural features given to the support of operating systems in these 32-bit microprocessors. Four main areas will be covered: concurrent processes, memory management, protection and exception processing.

The high level language and operating system support features of advanced microprocessors: Part I: High level language support features

Advanced microprocessors like the National Semiconductor NS32032, the Motorola MC68020, the Zilog Z80000, and the Intel iAPX386 have been designed with the following objectives in mind: high performance, enhanced operating system support capabilities, high level language support, high reliability, high availability, and high maintainability. Part I of this paper will examine the high level language support features of these microprocessors, thus providing a basis for comparison and also serving as a review of the relevant software concepts. Operating system support features will be treated in Pat II.