Adjustable Speed Drive System Research Articles

Detailed Estimation of Grid-Side Current and Its Oscillations Caused by Adjustable Speed Drive Systems

The current oscillations (ringings) associated with the voltage notches at the Point of Common Coupling (PCC), caused by the function of Diode Rectifiers (DRs) in Adjustable Speed Drives (ASDs), can impair the power quality and make Electro-magnetic Interference (EMI) issues. Considering these transients, this paper proposes an analytical approach to estimate the time-domain behavior of ASD systems with the focus on the operation of their DR. With the aim of simplifying the derivation of equations that govern the time-domain response of the ASD system, a new set of approximations are introduced. These approximations are carried out to find the contributing factors (parameters) in the formation of the undesirable Current Ringings (CRs) occurring in the grid-side of the ASD system. As power converters with a similar topology are used for different applications, such as in renewable energies, these new approximations and the derived equations can be applied in other fields (and other similar systems). The investigations suggest more design limitations for the passive components of the ASD system, such as the EMI filters. To prove the validity of the proposed approach, the obtained numerical results are verified by the simulation and experimental results.

Design of a Medium-Voltage High-Power Brushless Doubly Fed Motor With a Low-Voltage Fractional Convertor for the Circulation Pump Adjustable Speed Drive

The brushless doubly fed motor (BDFM) shows great potential for use in large medium-voltage adjustable-speed drive (ASD) systems due to its high reliability and cost benefits of a partially rated low-voltage power electronics converter. However, undesired performance caused by rich useless space-harmonics restricts the application of the BDFM in medium-voltage high-power ASD systems. In this article, a medium-voltage wound rotor BDFM consisting of specially designed stator and rotor windings is developed. First, the wound rotor with unequal turns and unequal pitches is designed and then compared with a nested loop counterpart. In addition, a 10 kV single-layer winding with shifted slot number in the stator is proposed to further reduce the space-harmonics by equivalent pitched effect. The finite element model of the BDFM is established to analyze electromagnetic performance and the influence of magnetic slot wedges. A lumped parameter thermal model is developed to quickly evaluate the average temperature rise of the proposed prototype. Field tests of driving a circulation water pump in a steel rolling mill were conducted to validate the feasibility of the proposed scheme.

Impedance modelling and stability assessment for grid‐connected dual‐PWM adjustable speed drives with motor torque oscillations

The grid-connected dual-PWM adjustable speed drives (ASDs) modulate the energy of the motor torque oscillation and inject it into the power system, potentially causing low-frequency oscillation (LFO) in the grid. In this study, considering the motor torque oscillation and harmonic common-modulation of the both-side converters, the precise sequence impedance models are derived for dual-PWM ASDs using the harmonic linearisation method. Based on the derived impedance of dual-PWM ASD, the torque oscillation, which is equivalent to the time-varying impedance, causes a series of discontinuities at the torque-oscillation-related frequencies on its amplitude-frequency curve. Moreover, these discontinuous drops make it more likely to intersect with the amplitude-frequency curve of the grid impedance, which may lead to LFO of the grid. Then, by applying the proposed impedance model and Bode plot, the stability of the grid-ASD cascade system with motor torque oscillation is assessed. The conclusions of stability analysis demonstrate the exact mechanism that the mechanical system oscillations lead to the grid-converter cascade system instability through the common-modulation and coupling of the dual-PWM ASD. Finally, experimental results on a 3 kW ASD system in the laboratory and measured results on the distribution grid in the Shanghai Yangshan Deepwater Port area verify the correctness and effectiveness of the proposed model and stability assessment.

A Comparison of Adjustable-Speed Drive Systems: Voltage Source Inverters and Load-Commutated Inverters for High-Power Applications

The current development of adjustable-speed drives (ASDs) has made voltage source inverter (VSI) technology available to high-power applications, such as large axial compressors. Hence, the comparison of VSI technology to the traditional way of controlling large rotating equipment with load-commutated inverters (LCIs) is of interest. This article compares the ASD systems for shaft powers of 20 MW or more. A drive system includes the drive, the supply network connection, and the motor behavior. System reliability and availability are the main drivers, while system efficiency and costs are additional motivations for the technology positioning. In general, the simple scalability of the LCI leads to maximum reliability, especially for very high power. VSI technology comes with a higher degree of flexibility in terms of possible output frequencies, cable lengths, and types of motor.

Multiple linear regression-based impact analysis of impedance network design on life expectancy of DC-link capacitor in q-ZSI fed motor drive

Most literature works carrying out capacitor remaining useful life (RUL) prognosis in a three-phase inverter fed Adjustable Speed Drive (ASD) system focus on analyzing the effect of different environmental and operating conditions. But it is the effect of inverter design parameters on capacitor RUL that is of greater interest to the inverter topology designers. This paper performs a parametric investigation on the impact of two design parameters primarily impedance (Z) network inductance (LZ), and shoot through duty ratio (Dsh) on capacitor RUL in a quasi-Z-source inverter (q-ZSI) fed ASD system. To perform this analysis, the online condition monitoring (OCM) of a capacitor placed in the Z network of q-ZSI topology is carried out, and its RUL is predicted for varying values of LZ and Dsh. The technique/procedure to monitor the operation of the system under study and collect its data for preventive maintenance without interrupting its operation is known as Online Condition Monitoring (OCM). The online method suggested in this paper uses data from the dynamic simulation (DS) model based on non-linear equations of q-ZSI. The use of the DS model increases the accuracy of OCM since it eliminates the use of data collected from sensors that are considered the cause of error in RUL prediction. A dataset of RUL predictions corresponding to multiple combinations ofLZ and Dsh is obtained through sensitivity analysis using Monte Carlo simulations, and the same dataset is used to derive a Multiple Linear Regression (MLR) model for RUL prediction. The sensitivity analysis data provides inferences on how the change in the selected design parameters affect the capacitor RUL in q-ZSI, and MLR model provides mathematical expression correlating LZ, Dsh and capacitor lifetime, with a 95% confidence level. The significance test statistics of the MLR model prove that LZ and Dsh are highly significant parameters that impact capacitor RUL in the system under study.

Modeling of Dual-PWM Adjustable Speed Drives for Characterizing Input Interharmonics Due to Torque Oscillations

The dual-PWM adjustable speed drives (ASDs) inject interharmonics into the distribution grid, causing low-frequency oscillation (LFO) in the grid. This article investigates the common-modulation process of motor load torque oscillation and how it resulting in interharmonic components in the front end of the back-to-back PWM-based ASDs. Particular emphasis is given to the theoretical analysis of interharmonic-causing frequency aliasing and fundamental root-mean-square (rms) LFO. Besides, based on the Bessel PWM switching function and common-modulation principle, a model of interharmonics generated by the dual-PWM ASDs is established. The proposed model, which takes into account the motor operating conditions and load torque disturbance, predicts the input interharmonic frequency locations and voltage rms LFO pattern with respect to bridge crane dual-PWM ASD systems. Simulation and experimental results on dual-PWM ASDs and distribution grid in the Shanghai Yangshan Deepwater Port area verify the effectiveness and feasibility of the model and the theoretical analysis.

Lifetime Estimation of DC-Link Capacitors in Adjustable Speed Drives Under Grid Voltage Unbalances

Electrolytic capacitor with a dc-side inductor is a typical dc-link filtering configuration in grid-connected diode rectified adjustable speed drives (ASDs). The criteria to size the dc-link filter are mainly from the aspects of stability and power quality. Nevertheless, the reliability of the dc-link filter is also an essential performance factor to be considered, which depends on both the component inherent capability and the operational conditions (e.g., electrothermal stresses) in the field operation. Nowadays, unbalanced voltage has the most frequent occurrence in many distribution networks. It brings more electrical-thermal stress to the component, affecting the reliability of the capacitors. In order to study the reliability performance of the LC filter in an ASD system quantitatively, this paper proposes a mission profile based reliability evaluation method for capacitors. Different from the conventional lifetime estimation, a nonlinear accumulated damage model is proposed for the long-term estimation, considering the nonlinear process of equivalent series resistor growth and capacitance reduction during the degradation. Based on the proposed lifetime estimation procedure, four case studies are investigated: first, lifetime benchmarking of capacitors in LC filtering and slim capacitor filtering configurations; second, scalability analysis for the lifetime of capacitors in terms of system power rating and grid-unbalanced levels; third, lifetime estimation of capacitors in the dc-link filter with long-term mission profile; and fourth, the impact of the capacitor sizing on the lifetime of the dc-link capacitor under grid-balanced and grid-unbalanced conditions. The results serve as a guideline for proper selection of dc-link configurations and parameters to fulfill a specification in ASDs.

Load‐independent harmonic mitigation in SCR‐fed three‐phase multiple adjustable speed drive systems with deliberately dispatched firing angles

Adjustable speed drives (ASD) are widely used in industry for energy savings, where low-cost diode rectifiers are still employed as the front-ends, also for simplicity in control and reliability in operation. However, significant harmonics appear at the grid, which should be tackled according to standards and/or grid-connection rules. If not, a poor power quality will cause the efficiency of the entire system drop. Currently, communication technologies are still not very cost-effective for industrial harmonic control in multiple parallel motor-drive systems. Therefore, this study proposes a harmonic mitigation strategy for multiple ASD systems, where silicon-controlled rectifiers (SCR) with boost converters in the dc-link have been adopted to increase the harmonic-current controllability. More specific, the SCR firing angles are deliberately dispatched among the drive units, which results in certain phase shifts of the SCR currents on purpose. Consequently, the harmonics appearing in the grid current can be mitigated to some extent without communication. The effectiveness is independent of an individual SCR system loading when a number of drives are connected. Simulations are carried out to verify the discussion. Furthermore, to maximize the harmonic cancellation, a customised modulation scheme has been experimentally demonstrated. Both simulation and experimental results have confirmed the analysis.

High‐frequency modelling of permanent magnet synchronous motor with star connection

Permanent magnet synchronous motor (PMSM) has been widely applied in a pulse width modulation inverter-fed adjustable speed drive (ASD) system. However, electromagnetic interference (EMI) has become a critical issue in such a system. Plenty of high-frequency harmonic components, generated by high dv/dt or di/dt of the modern transistors, can be observed on the line-to-line voltage across motor terminals. To study the conducted EMI issues existed in the ASD system, an improved model of PMSM is developed to represent the high-frequency behaviour, and the equivalent circuit parameters for common mode (CM) and differential mode (DM) are extracted based on the measurements. The model calculated CM and DM impedances are in good agreement with the measured ones from the impedance analyser, which verifies the effectiveness of the proposed high-frequency model.

Characterization of Input Current Interharmonics in Adjustable Speed Drives

This paper investigates the interharmonic generation process in the input current of double-stage adjustable speed drives (ASDs) based on voltage-source inverters and front-end diode rectifiers. The effects of the inverter output-side low order harmonics, caused by implementing the double-edge symmetrical regularly sampled space vector modulation technique, on the input current interharmonic components are presented and discussed. Particular attention is also given to the influence of the asymmetrical regularly sampled modulation technique on the drive input current interharmonics. The developed theoretical analysis predicts the drive interharmonic frequency locations with respect to the selected sampling strategies. Simulation and experimental results on a 2.5 kW ASD system verify the effectiveness of the theoretical analysis.

Flux Linkage Detection Based Ground Fault Identification and System Diagnosis in High-Resistance Grounding Systems

High-resistance grounding (HRG) is preferred in many industrial applications where the operation continuity is critical under ground fault conditions, such as pulp, paper, oil refining, chemical, glass, and metal industries. This is due to: 1) continuity of service; 2) minimized productivity impact with the scheduled system downtime; and 3) improved safety concerns—elimination of phase to ground arc flash hazards, suppression of transient line to ground overvoltages, and minimization of the equipment damage at the point of ground fault. However, there are also some drawbacks in accurately detecting and locating a ground fault in adjustable speed drive (ASD) systems: 1) the HRG fault current (1–10 A) cannot reliably trip the overcurrent protection function in drives; 2) the existing methods are based on the line voltage/frequency (50/60 Hz), making it hard to detect and locate low-voltage/low-frequency ground faults; and 3) with the existing methods, the possible fault locations will be manually checked one by one using an Ammeter by a trained technician. This paper will present a flux linkage detection based HRG fault identification method for ASD systems. The proposed method can solve: 1) reliable HRG fault detection with wide motor speed range; 2) the HRG fault can be easily identified in multiple systems; and 3) the identification process is performed by the proposed system diagnosis method, no trained technician is required during the identification process.

Enhanced Phase-Shifted Current Control for Harmonic Cancellation in Three-Phase Multiple Adjustable Speed Drive Systems

A phase-shifted current control can be employed to mitigate certain harmonics induced by the diode rectifiers and silicon-controlled rectifiers as the front ends of multiple parallel adjustable speed drive (ASD) systems. However, the effectiveness of the phase-shifted control relies on the loading condition of each drive unit as well as the number of drives in parallel. In order to enhance the harmonic cancellation by means of the phase-shifted current control, the currents drawn by the rectifiers should be maintained almost at the same level. Thus, this paper first analyzes the impact of unequal loading among the parallel drives, and a scheme to enhance the performance is introduced to improve the quality of the total grid current, where partial loading operation should be enabled. Simulation and experimental case studies on multidrive systems have demonstrated that the enhanced phase-shifted current control is a cost-effective solution to multiple ASD systems in terms of harmonic cancellation.

Single-Phase Input Variable-Speed AC Motor System Based on an Electrolytic Capacitor-Less Single-Stage Boost Three-Phase Inverter

This paper presents a single-phase to three-phase adjustable-speed drive (ASD) system, which consists of a diode rectifier and a single-stage boost inverter without electrolytic capacitors (E-caps). The system has no shoot-through issues and gains high reliability due to the shoot-through zero-state regulation method. By using electrolytic capacitors-less topology, the lifetime can be greatly increased. By properly designing the tapping position of the inductor, the system has a high boost-inversion gain and can ride through grid voltage sags. By using the proposed harmonic injection method, the system can realize high input power factor and small dc-link ripple voltage, simultaneously. Experimental results of the electrolytic capacitors-less single-stage boost inverter (E-caps-less SSBI) based single-phase to three-phase ASD system are obtained to verify the actual performances.

A Fault-Tolerant Three-Phase Adjustable Speed Drive Topology With Active Common-Mode Voltage Suppression

A fault-tolerant adjustable speed drive (ASD) topology is introduced in this paper. A conventional ASD topology is modified to address: 1) drive vulnerability to semiconductor device faults; 2) input voltage sags; 3) motor vulnerability to effects of long leads; and 4) minimization of common-mode (CM) voltage applied to the motor terminals. These objectives are attained by inclusion of an auxiliary IGBT inverter leg, three auxiliary diodes, and isolation-reconfiguration circuit. The design and operation of the proposed topology modifications are described for different modes: 1) fault mode, 2) active CM suppression mode, and 3) auxiliary sag compensation (ASC) mode. In case of fault and sag, the isolation and hardware reconfiguration are performed in a controlled manner using triacs/antiparallel thyristors. In normal operation, the auxiliary leg is controlled to actively suppress CM voltage. For inverter IGBT failures (short circuit and open circuit), the auxiliary leg is used as a redundant leg. During voltage sags, the auxiliary leg, along with auxiliary diodes, is operated as a boost converter. A current-shaping control strategy is proposed for the ASC mode. A detailed analysis of CM performance of the proposed topology is provided, and a new figure of merit, CM distortion ratio (CMDR), is introduced to compare the attenuation of CM voltage with that of a conventional ASD topology. The output filter design procedure is outlined. A design example is presented for an 80 kW ASD system, and simulation results validate the proposed auxiliary leg based fault-tolerant scheme. Experimental results from a scaled prototype rated at 1 hp are discussed in this paper.

Testing Large ASDS

Driving compressors and pumps by means of large adjustable-speed drive systems (ASDSs) is increasing in oil and gas applications, specifically for gas/oil transportation, gas liquefaction, and gas injection/lift. The importance of the ASDS availability for the plant operability calls for extensive factory testing to uncover any possible hidden weakness of components and system design issues before delivery at site. The complete ASDS lineup shall be full load tested before string test with the compressor/ pump to prove system electrical performances, protections, and control functionalities. This paper focuses on procedures, recommendations, and experiences on testing ASDSs, and it goes through technical challenges to be faced when testing this large equipment. Not only foundation design and rotor dynamic analysis but also measurement strategies for distorted load and efficiency calculation are part of the content of this paper. Typical testing requirements in accordance to international standards and oil-and-gas plant specifications are also discussed in terms of practical solutions to be adopted during tests, feasibility basing on ASDS power rating, and need for simulations. Real-case testing results and method are also treated in order to give handy information.

Modeling of Conducted EMI in Adjustable Speed Drives

This paper deals with conducted electromagnetic interferences (EMIs) in adjustable-speed drive (ASD) systems. For some years, the use of high-speed switching power devices in ASDs induces high-voltage ( dv/dt) and high-current ( di/dt) variations that excite the parasitic elements of the power circuit, inducing conducted emissions. The advent of these devices has thus generated several unexpected problems, such as premature deterioration of motor ball bearings and high increases in the EMI levels, which are caused by the circulation of the high-frequency currents. In order to evaluate the level of the common-mode (CM) and the differential-mode (DM) currents in the ASD system, it is necessary to use a precise model of the pulse width modulation (PWM) inverter, power cable, and ac motor that takes into account various phenomena, which appear when the frequency increases. First, a PWM inverter and shielded four-wire power cable model are presented. Then, a new high-frequency modeling method of the ac motor is proposed. Finally, the ASD system is simulated and the obtained results are compared to the experimental measurements in the frequency and time domains.

Analysis of cutting-edge techniques in the high voltage and high power adjustable speed drive systems

The high voltage and high power adjustable speed drive (ASD) system is one of the most attractive fields in power electronics, and it is also a very crucial technique for energy saving and emission reduction. This paper discussed and analyzed the main cutting-edge knowledge and issues in the process of exploiting the high voltage and high power ASD system.

Impact of Input Voltage Sag and Unbalance on DC-Link Inductor and Capacitor Stress in Adjustable-Speed Drives

This paper investigates the impact of input voltage unbalance and sags on stresses in the dc-bus choke inductor and dc-bus electrolytic capacitors of adjustable-speed drives (ASDs). These stresses are primarily attributable to the rectifier's transition into single-phase operation, giving rise to low-order harmonic voltages (120 Hz, 240 Hz, etc.) that are applied to the dc-link filter components. These harmonics elevate the ac-flux densities in the dc choke core material significantly above values experienced during normal balanced-excitation conditions, causing additional core losses and potential magnetic saturation of the core. It is shown that the effects of voltage unbalances and sags on the dc-link capacitor lifetime will be the same when either line inductors or a dc-link choke inductor are used if the dc choke-inductance value is twice the value of the line inductance. Simulations and experimental tests are used to verify the accuracy of predictions provided by closed-form analysis and simulation for a 5-hp or 3730-W ASD system.

A new design tool to protect industrial long-cable PWM ASD systems against high-frequency overvoltage problems

This work presents a new tool for use in the design of long-cable adjustable-speed drive (ASD) systems. It allows coordination between the inverter, the motor and the cable type and length in order to protect the motor against overvoltages due to the reflected wave. Detailed mathematical formulas describing the transient voltage and current along the cable are first developed in the frequency domain. Then, by applying the boundary conditions at the cable ends and assuming a lossless cable, delay equations are developed in the time domain. Using these equations, an appropriate simulation scheme is built with the SimPowerSystems (SPS) and Simulink modules of the MATLAB software environment to compute the high-frequency overvoltages (and their associated currents) at the ends of the feeding cable. The proposed tool has been applied to a 5 kVA industrial ASD prototype using a four-wire shielded long cable. The paper includes simulation results and experimental validations.

DC-Bus Electrolytic Capacitor Stress in Adjustable-Speed Drives Under Input Voltage Unbalance and Sag Conditions

This paper analyzes the effects of the input voltage unbalance and sags on the dc-bus electrolytic capacitors in adjustable-speed drives (ASDs) in order to predict their impact on expected capacitor lifetime. The key phenomenon that causes these problems is the transition of the rectifier stage from three-phase to single-phase operation. Since the equivalent series resistance increases at low frequencies, the low-order harmonic current components (e.g., 120 and 240 Hz) contribute disproportionately to the capacitor power losses and temperature rise, resulting in reduced lifetime. Closed-form expressions are developed for predicting these effects including the impact of finite line impedance, finite bus capacitance, and varying load. The impact of inverter space-vector pulsewidth-modulation switching on the capacitor loss is also included. Simulations and experimental tests are used to verify the accuracy and effectiveness of the closed-form analysis using a 5-hp ASD system