Adjacent Channel Power Rejection Research Articles

A 0.66mW 400 MHz/900 MHz Transmitter IC for In-Body Bio-Sensing Applications.

A sub-1GHz transmitter (TX) integrated chip (IC) with ultra-low power consumption and moderately high adjacent channel power rejection (ACPR) is presented for in-body bio-sensing applications. The 400 MHz 12-phase digital power amplifier (DPA) is implemented with the proposed 16QAM modulation scheme to improve the energy efficiency. The TX IC also contains a 900 MHz FSK TX realized with a symmetrical edge-combiner, which can be used in the low accuracy mode. A fully digital modulator with band shaping is integrated on the chip for the improvement of ACPR performance. Fabricated in 65-nm CMOS process, the chip occupies an active area of 0.75 mm2. Under 0.5 V supply voltage, the TX consumes less than 0.66 mW power consumption while delivering -15 dBm of output power when operating at both bands. The presented TX has an energy efficiency performance comparable to the state-of-the-arts low power designs, with the measured average energy consumption of 64.5/220 pJ/bit, and the measured figure-of-merit (FoM) of 2.04/6.98 nJ/(bit · mW) for the two bands. Compared with the state-of-the-arts sub-1mW designs in literatures, the ACPR is improved by at least 13 dB.

Characteristics of GaAs Power MESFETs with Double Silicon Ion Implantations for Wireless Communication Applications

GaAs power metal-semiconductor field-effect transistors (MESFETs) were fabricated using direct double silicon (Si) ion implantation technology for wireless communication applications. A 150-µm MESFET had a saturation drain current of 238 mA/mm after Si3N4passivation. A 15-mm MESFET, when measured under a class-AB condition with a biased drain voltage of 3.4 V and a quiescent drain current of 600 mA, delivered a maximum output power (Pout) of 31.1 dBm and a maximum power-added efficiency (PAE) of 58.0% at a frequency of 1.88 GHz. The MESFET exhibited aPoutof 29.2 dBm with a PAE of 45.0% at the 1-dB gain compression point. The MESFET, when measured under a deep class-B condition with a biased drain voltage of 4.7 V and a quiescent drain current of 50 mA, achieved a maximumPoutof 33.1 dBm and a maximum PAE of 55.9% at 1.88 GHz. The MESFET operating at 4.7 V and 1.88 GHz exhibited aP1dBof 31.8 dBm and an associated PAE of 47.1% at the 1-dB gain compression point. When tested by IS-95 code-division multiple access (CDMA) standard signals and biased at 4.7 V under the deep class-B condition, the MESFET with aPoutof 28 dBm demonstrated an adjacent channel power rejection (ACPR) of –31.2 dBc at +1.25 MHz apart from the 1.88 GHz center frequency and –45.7 dBc at +2.25 MHz.

Linearity Characteristics of Field-Plated AlGaN/GaN High Electron Mobility Transistors for Microwave Applications

A field-plated (FP) AlGaN/GaN high electron mobility transistor (HEMT) was fabricated. Investigations on the linearity characteristics were performed through two-tone and wide band code division multiple access (WCDMA) modulated excitations. The FP-HEMT exhibited an improved breakdown voltage of 160 V compared with that of the conventional HEMT. Additionally, a higher output power of 25.4 dBm with 43% power added efficiency at a 30 V drain bias at 2 GHz was achieved. When biased at 30 V and 15 mA/mm current density, the third-order intermodulation (IM3) level was measured to be -27.1 dBc (at P1dB) and the adjacent channel power rejection (ACPR) was -33.8 dBc (at P1dB) under WCDMA modulation at 2 GHz. Measurement results revealed that the field-plated structure improved the linearity performance over the conventional structure at high output power levels even beyond P1dB.

High Average-Efficiency Multimode RF Transmitter Using a Hybrid Quadrature Polar Modulator

This paper presents a hybrid quadrature polar modulator (HQPM) to drive the power amplifier (PA) highly efficiently in a wireless RF transmitter required for multimode operation. For enhancing the transmit efficiency, a switching-mode PA realized as Class-E design is used in the transmitter. The HQPM consists of a quadrature modulator for processing the RF modulated carrier and a Class-S modulator for processing the supply-voltage signal. The quadrature modulator and the Class-S modulator deliver the output signals with proportional envelope variation before being inserted into the RF-input terminal and the supply-voltage terminal of a Class-E PA, respectively, causing the double envelope modulation to distort the modulated RF signal at the PA output. Therefore, a digital predistorter is embedded in the HQPM for compensation. The proposed HQPM-based transmitter can help reducing the average dc and input RF powers and the output feedthrough levels so as to enhance power added efficiency and adjacent channel power rejection remarkably.

Experimental investigations on BER degradations due to analogue channel filtering in zero-IF receivers for FDD WCDMA

An experimental relationship between the bit error rate (BER) of a release ‘99 wideband code division multiple access (WCDMA) baseband modem and the error vector magnitude (EVM) due to analogue amplitude/group delay distortions in zero-IF channel filters is presented. The reported data eases system design in choosing the best trade-off between adjacent channel power rejection and optimum BER performance in designing channel filters in Zero-IF receivers for WCDMA.

A novel programmable predistortion circuit for broadband InGaP/GaAs HBT power amplifier

AbstractA novel programmable MMIC predistortion circuit as an input stage of a broadband power amplifier (PA) is proposed and designed. By varying its reference voltage, one can adjust the magnitude of gain expansion and negative phase deviation to compensate the typical nonlinearities of the following stages in a PA, as well as temperature and fabrication variations. A gain expansion of 4–5 dB and a phase improvement of 5–6° are achieved in simulation. The measurement results show that P1dBis improved by 3 dB and adjacent channel power rejection ratio (ACPR) by 5 dBc at 27 dBm output power. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 141–143, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22080

Modeling nonlinear distortion of ultra wideband signals at X-band

Nonlinear distortion in the adjacent channels of an X-band amplifier driven by an ultra-wideband digitally-modulated carrier is analyzed. Statistical properties of the input signal with a complex power series-based behavioral model of the amplifier are used to calculate the output power spectrum. Comparisons are made between measured and predicted adjacent channel power rejection for the X-band monolithic microwave integrated circuit.

Evaluation of ACPR in mixers based on a parametric harmonic-balance approach

This paper reports an extension of parametric harmonic balance (PHB) to efficiently analyze mixers excited by communications signals. In the case of digitally modulated signals, PHB is demonstrated in this paper, exhibiting reduced simulation times and memory resources. For validation purposes, a high electron-mobility transistor mixer has been constructed and characterized with single- and two-tone 2-GHz input RF signals, and also the output spectra under Universal Mobile Telecommunications System-wide-band code-division multiple-access signal excitations above the 1-dB compression point have been obtained. In addition to its fast convergence properties, the presented simulations demonstrate a very good agreement with experimental results. The close correspondence between calculated and measured spectral regrowth permitted a reliable prediction of adjacent channel power rejection

The impact of RF front-end characteristics on the spectral regrowth of communications signals

The nonlinear characteristic of an RF front-end results in in-band distortion and spectral regrowth of digitally modulated signals with distortion being dependent on the statistical variation of the signal. In this paper, the interaction of the nonlinear response with the signal is explored using a time-averaged autocorrelation analysis applied to several limiter-amplifier models having characteristics ranging from soft-to-hard amplitude limiting. The analysis is verified by comparing measured and predicted adjacent channel power rejection for a code-division multiple-access amplifier.

Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver

This paper presents a full-CMOS transmitter and receiver for 2.0-GHz wide-band code division multiple access with direct conversion mixers and a DC-offset cancellation scheme. The direct conversion scheme combined with a multiphase sampling fractional-N prescaler alleviates the problems of the direct conversion transmitter and receiver. Digital gain control is merged into the baseband filters and variable-gain amplifiers to optimize the linearity of the system, reduce the noise, and improve the sensitivity. Variable-gain amplifiers with DC-offset cancellation loop eliminate the DC-offset in each stage. The chip implemented in 0.35-μm CMOS technology shows the experimental results of 6 dBm maximum output power with 38-dB adjacent channel power rejection ratio at 1.92 MHz, 50-dB dynamic range, and 363-mW power consumption in the transmitter. The receiver shows -115.4 dBm sensitivity, a 4.0-dB noise figure, and a dynamic range of 80-dB with 396-mW power consumption.

Digital-to-Analog Conversion of Pulse Amplitude Modulated Systems Using Adaptive Quantization

In this paper, a full analysis is presented on digital-to-analog conversion for pulse amplitude modulated (PAM) systems. By analyzing the cyclostationary nature of pulse-amplitude modulation (PAM) systems, two methods of quantization are proposed – fixed and adaptive. Examples of this quantization analysis are provided for the reverse link transmitter chain in a cdma2000 system, and for the baseband transmitter chain of an IS-136 system. In addition, the impact of D/A converter nonlinearity on resultant signal-to-noise ratio is analyzed. Simulations are provided which show that adaptive quantization provides performance benefits over fixed methods in terms of adjacent channel power rejection (ACPR) and transmitter signal-to-noise ratio.

A GaAs/AlAs Wet Selective Etch Process for the Gate Recess of GaAs Power Metal-Semiconductor Field-Effect Transistors

A highly selective wet chemical etch process for gate recess of the GaAs power metal-semiconductor field effect transistors (MESFETs) was developed. The power MESFETs used in this study were epitaxially grown devices with a 20 Å AlAs etch-stop layer for gate recess. The selective etch process using citric acid/potassium citrate/hydrogen peroxide solution was studied. A selectivity better than 3800:1 was achieved for GaAs/AlAs layers. This selective etch was applied both to high-power, high-voltage power MESFETs and low-voltage large-periphery power MESFETs. For high-power applications, the 14.7 mm device had a breakdown voltage of 22 V. When tested at 1.88 GHz with a drain bias of 10 V, it provided a maximum output power of 38.8 dBm and a maximum power-added efficiency of 52.5%. For low-voltage applications, the 19.8 mm device was tested under IS-95 code-division multiple access (CDMA) modulation at 1.88 GHz with a drain bias of 3.5 V. Under CDMA modulation, the device showed an output power of 28.03 dBm with an adjacent channel power rejection of −29.6 dBc at 1.25 MHz offset frequency. Both devices also showed excellent uniformity in pinch-off voltages. © 2000 The Electrochemical Society. All rights reserved.

A planar gate double beryllium implanted GaAs power MESFET for low voltage digital wireless communication application

An ion-implanted planar gate power MESFET for low voltage digital wireless communication system including DCS1800 (digital cellular system at 1800 MHz) and CDMA (code division multiple access) handset applications has been developed. The process for the device developed contains double Be implantation to reduce the surface and substrate defect trapping effects. The MESFET process developed has very little gate recess (less then 200 /spl Aring/), which greatly improves the uniformity and the yield of the wafer. The 1 /spl mu/m/spl times/20 mm MESFET manufactured using this planar gate technology exhibits an output power of 32.98 dBm and power added efficiency over 53% with gain of 11.2 dB when tested at 1.9 GHz under 3.6 V drain bias voltage and 80 mA quiescent drain current. The pinch off voltage of the 20 mm devices within a wafer is -2.81 V with a standard deviation of 120 mV. The device was also tested at 3.6 V and 1.9 GHz for CDMA application. Under the IS-95 CDMA modulation at 28 dBm output power, the device gain is 10.7 dB and the device has an adjacent channel power rejection (ACPR) of -29.5 dBc at 1.25 MHz offset frequency and -44.9 dBc at 2.25 MHz offset. The test data shows that the double Be implanted devices developed using the planar gate technology have very good linearity and efficiency and can be used for the low voltage DCS1800 and CDMA handset applications.

A 2.2-V operation, 2.4-GHz single-chip GaAs MMIC transceiver for wireless applications

A 2.2-V operation, single-chip GaAs MMIC transceiver has been successfully developed for 2.4-GHz-band wireless applications such as wireless local area network terminals. The chip is fabricated using a planar self-aligned gate field-effect transistor. To generate sufficient negative voltage for gate-biasing and to enhance switch power handling capability under a 2.2-V supply, a newly designed negative voltage generator with a voltage doubler (NVG-VD) and a switch control logic circuit are integrated on the chip, together with a power amplifier, a transmit/receive switch, and a low-noise amplifier. The NVG-VD is designed to produce both a 3.3-V positive step-up voltage and a -2.1-V negative voltage under 2.2 V in operation voltage. Biased with these outputs, the logic circuit accommodates high power outputs of over 25 dBm with a low operating voltage of 2.2 V in transmit mode, With a 2.45-GHz modulated signal based on IS-95 standards, a 21-dBm output power and a 33% efficiency are obtained at a /spl plusmn/1.25-MHz-offset adjacent channel power rejection of -45 dBc. In receive mode, a low-noise amplifier achieves a 1.8-dB noise figure and an 11-dB gain with a 3.0-mA current. This transceiver enables significant size and weight reductions in 2.4-GHz-band wireless application terminals.

An HBT MMIC power amplifier with an integrated diode linearizer for low-voltage portable phone applications

This paper gives a detailed description of a novel linearization technique using a transistor base-collector junction diode. The novel linearization technique effectively improves the gain compression and phase distortion of the heterojunction bipolar transistor (HBT) with no additional dc consumption, leading to highly efficient linear amplification of the /spl pi//4 DQPSK modulation signals. An AlGaAs/GaAs HBT monolithic microwave integrated circuit (MMIC) linear power amplifier was fabricated using the novel linearization technique for the handsets used in the 1.9 GHz Japanese Personal Handy Phone System (PHS). The fabricated HBT MMIC power amplifier exhibits an output power of 21 dBm and a power-added efficiency as high as 37% at an operation voltage of 2.7 V. At this rated output power, the adjacent channel power rejection in /spl plusmn/600 kHz offset frequency bands is -55 dBc and the error vector magnitude is 4.3%. This measured linearity is well within the PHS standard.

Effects of nonlinear distortion on CDMA communication systems

We report a rigorous approach to analyze the effects of nonlinear distortion on code division multiple access (CDMA) wireless communication systems based on time-domain analysis and band-pass nonlinearity theory. Given AM-AM and AM-PM characteristics of a nonlinear device, this technique is capable of predicting adjacent channel power rejection (ACPR), noise power ratio (NPR), two-tone intermodulation products, CDMA waveform quality, and baseband signal vector constellation at the output of the nonlinear device. To demonstrate and verify the capability of this technique, an L-band power amplifier was designed, built, tested with CDMA waveforms, and compared with the simulated results. Excellent agreement between the measured and predicted results has been achieved.