Additional Power Dissipation Research Articles

0.5 V Universal Filter and Quadrature Oscillator Based on Multiple-Input DDTA

This paper presents a universal voltage-mode filter and quadrature oscillator based on low-voltage multiple-input differential difference transconductance amplifier (MI-DDTA). Unlike the previous published DDTAs, that utilize the bulk-driven (BD) multiple-input MOS transistor technique (MI-MOST) in the differential pair of the first stage only, the proposed DDTA, for the first time, utilize the BD MI-MOST in the second stage of the DDTA. This results in capability of providing more arithmetic operations without additional current branches or power dissipation. Hence, simplify the topology of the filter and oscillator applications, by decreasing the count of active blocks. The voltage-mode filter offers high-input and low-output impedances, and both non-inverting and inverting versions of five types of transfer functions, namely low-pass, high-pass, band-pass, band-stop, and all-pass characteristics. The oscillator offers three-phase of quadrature signals, and orthogonal control of the condition and frequency of oscillations. The circuit was designed in Cadence environment using 180 nm CMOS TSMC technology. The voltage supply is 0.5 V and the power consumption of the filter is 472 nW. The simulation results are in accordance with theory and confirm the performance of the proposed circuit.

Electrochemical Catalysis Generated By an External Electric Field in Conjunction with a Low Density-of-States Conductor

In electrochemistry the reaction rate depends strongly on the voltage difference applied between the two electrodes. A voltage increase at the electrodes will generate a larger electric field in the electric double layer (EDL), which increases the reaction rate, but this will also cause additional power to be dissipated. We show both theoretically and experimentally that one can increase the electrochemical reaction rate, at no additional cost in power, by utilizing an external electric field in the proximity of a material catalyst. This is not surprising since, although the exact mechanism for catalysis due to a material compound can be quite intricate, the basic underlying physical processes for catalysis can often be shown to be due to the molecular electric field at a specific catalyst surface site. Here we generalize this observation and show how the application of a ‘simple external’ electrostatic field in conjunction with a low density-of-states conductor such as graphene can be used to intensify the already large electric field in the EDL layer - thus accelerating the reaction rate without additional power dissipation. We focus on water electrolysis (more specifically, the hydrogen evolution reaction - HER) in our electrochemical reaction study. Based on our observed experimental results as well as our theoretical analysis we show how an electrode incorporating trapped charge at the interface between two dielectrics will generate a large electrostatic field which, in conjunction with the quantum capacitance of a low density-of-states conductor, allows penetration of this field into the electric double layer (EDL), thereby adding to the original EDL field and thus, functioning as a reaction rate accelerant or a catalyst. Our experiment shows a 100% increase in the hydrogen generation rate for the HER reaction when employing our external electrostatic ‘catalyst’ technique. Since this method depends primarily on the enhancement of the EDL electric field for the reaction rate increase, it can be universally applied to all electrochemical reactions without requiring a detailed molecular level understanding of the reaction of interest.

A Fully Integrated 490-GHz CMOS Receiver Adopting Dual-Locking Receiver-Based FLL

A fully integrated 490-GHz receiver (RX) adopting a dual-locking receiver-based FLL (DL-RBFLL) is presented. The proposed RBFLL structure saves the power consumption by reusing the existing blocks in RX instead of the power-hungry blocks such as dividers and buffers operating at sub-THz. Contrary to the single-loop implementation, the dual-loop RBFLL, which consists of the coarse and fine locking loops, extends the locking range by six times with negligible additional power dissipation. In the RF front-end (FE), the proposed 2nd-order sub-harmonic mixer (SHM) enhances interport isolation and suppresses the undesired LO leakage using a simple passive network. In the IF path, a 2-stage low-noise amplifier (LNA) followed by a 10-stage programmable gain amplifier provides a controllable gain of 0–80 dB with 4-dB step. An N-path filter, which serves as a high-Q bandpass noise filter, improves SNR in the IF path and thus RX sensitivity. Implemented in a 65-nm CMOS, the 490-GHz RX achieves the measured noise figure of 51.1 dB and noise equivalent power (NEP) of 0.85 pW/Hz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{0.5}$ </tex-math></inline-formula> for the noise bandwidth of 17 MHz. The estimated sensitivity of the proposed RX is −92.9 dBm for a 1 kHz noise bandwidth, which dissipates 31.8 mW from a 1.2-V supply.

A low-loss passive filter for overvoltage mitigation of inverter-driven motors with ultra-long cables

Variable frequency drives (VFDs) are always considered in industrial applications because of their benefits. However, in applications with long cables, overvoltage spikes appear at the motor terminal due to the reflection phenomenon, causing the premature failure of the motor. Various passive and active techniques have been proposed to solve this issue. Among them, passive techniques are preferred due to their simplicity, low cost and effectiveness. However, the use of passive filters in ultralong cables is limited due to additional power dissipation. In this paper, L-RC filter is presented and shown to be efficient for ultra-long cables. The proposed filter does not have the limitations and problems associated with the conventional L and RC filters. The PWM inverter-fed ac motor drive system is fully modelled to evaluate the performance of the proposed filter. The presented model is simulated in the Matlab software and the effect of different parameters on the filter performance is evaluated. Finally, in an actual 37 kW system, the performance of the proposed filter is compared with that of the conventional filters. The experimental results show the good performance of the proposed filter in reducing the voltage overshoots, increasing the rise time and decreasing power dissipation.

CFD simulation of grease lubrication: Analysis of the power losses and lubricant flows inside a back-to-back test rig gearbox

• Simulation of grease lubrication in gearboxes. • Qualitative validation in terms of lubricant distribution. • Quantitative validation in terms of power losses. • A new mesh-handling technique that allows a drastic reduction of the simulation time. Mineral or synthetic oils and greases are typically used to lubricate mechanical components, which would otherwise suffer from premature wear. While the lubricants impede the direct contact between surfaces reducing the friction, their presence and interaction with moving parts implies additional power dissipation (churning). Most of the analyses in literature have been performed with oil as lubricant, while grease was poorly touched both experimentally and numerically. Being grease a non-Newtonian fluid, density and viscosity are not enough to describe the fluid behavior, and additional properties are necessary to fully define these kinds of fluids. In this work, the churning phenomena related to grease lubrication are investigated on a back-to-back test rig equipped with two gearboxes exploiting Computational Fluid Dynamics (CFD). The grease distribution as well as the power dissipation are analyzed numerically. The results in terms of lubricant distribution and power losses are compared with oil as lubricant cases. A highly efficient mesh handling strategy was used to simulate the gearbox, making it possible to drastically reduce the computational effort of the simulations, thus opening new scenarios for a massive introduction of CFD applied to lubrication also in industry.

Parallel connected GaN E‐HEMT VSI‐based servo drives for PMSMs

The operation of parallel-connected servo drives has the advantages of increasing the torque (hence the power) capacity, reliability, redundancy and modularity. However, smaller discrepancies of the system clocks of the independent microcontrollers, asynchronous pulse width modulation (PWM) carrier signals and hardware differences can make the output voltages of the parallel modules non-identical, which results in circulating currents. These circulating currents limit the parallel operation, introduce additional power dissipation, cause unbalanced power distribution and degrade the control performance. To eliminate the circulating currents separated DC supplies, coupled inductors (CIs), PWM techniques, modified control techniques etc. are proposed in the literature. In this study, a fault-tolerant parallel-connected gallium nitride enhancement-mode high electron mobility transistor voltage source inverter-based servo drive scheme that eliminates the need for CIs and separate DC supplies and also enables the use of a standard proportional-integral current control and a standard space vector PWM approach is proposed and tested. To evaluate the performances of the proposed scheme, up to six servo drives (limit-6 × 7 Arms) are connected in parallel and tested under various conditions with a 24 V permanent magnet synchronous motor (nominal-61.9 Arms). The results show that the parallel operation not only increases the torque capacity of the system but also increases modularity, flexibility, reliability and also redundancy.

A W-Band Divide-by-Three Injection-Locked Frequency Divider With Injection Current Boosting Utilizing Inductive Feedback in 65-nm CMOS

A compact ${W}$ -band divide-by-three injection-locked frequency divider (ILFD) is presented in 65-nm CMOS technology. To provide a wide locking range, we propose inductive feedback to boost the injection current. With the proposed approach, the locking range of the ILFD can be wider than 10% without any varactor and additional power dissipation which is more than three times the locking range compared with the reference ILFD without boosting of the current injection. The measured locking range of the proposed ILFD was from 73.9 to 82.5 GHz with the ${W}$ -band input signal power of 0 dBm, and the phase noise at 1 MHz was −117.13 dBc/Hz at the input frequency of 78 GHz. The implemented ILFD with the inductive feedback consumes 7.88 mW under a 1 V supply, and its core size is 0.22 mm2.

Fast division in the residue number system {2n + 1,2n, 2n-1} based on shortcut mixed radix conversion

Unlike the parallelism residue number systems (RNS) provide for addition and multiplication, RNS division is often performed via a straightforward RDF (i.e., reverse conversion, binary division, and forward-conversion) scheme. Given the lack of any faster-than-RDF RNS divider, we designed one for the popular moduli set {2n + 1, 2n,2n − 1}, via mixed radix representation of the operands and two parallel 2n-bit dividers (vs. the 3n-bit counterpart required by the RDF). However, the ensued RNS integer quotient could be off the correct result by ± 1, which is tolerated in many approximate arithmetic processes. Nevertheless, we obtain the accurate quotient via additional hardware (i.e., six parallel n-bit comparators). Our experimental results, for n = 8(16), as compared to RDF, show 33%(36%) less delay, 3%(12%) less energy, and 35%(43%) less energy-delay product in case of the minimal-error approximate divider and 14%(21%) less delay in case of the exact implementation, at the cost of additional area consumption and power dissipation.

A Biomedical Sensor System With Stochastic A/D Conversion and Error Correction by Machine Learning

This paper presents a high-precision biomedical sensor system with a novel analog-frontend (AFE) IC and error correction by machine learning. The AFE IC embeds an analog-to-digital converter (ADC) architecture called successive stochastic approximation ADC. The proposed ADC integrates a stochastic flash ADC (SF-ADC) into a successive approximation register ADC (SAR-ADC) to enhance its resolution. The SF-ADC is also used as a digitally controlled variable threshold comparator to provide error correction of the SAR-ADC. The proposed system also calibrates the ADC error using the machine learning algorithm on an external PC without additional power dissipation at a sensor node. Due to the flexibility of the system, the design complexity of an AFE IC can be relaxed by using these techniques. The target resolution is 18 bits, and the target bandwidth (without digital low-pass filter) is about 5 kHz to deal with several types of biopotential signals. The design is fabricated in a 130-nm CMOS process and operates at 1.2-V supply. The fabricated ADC achieves the SNDR of 88 dB at a sampling frequency of 250 kHz by using the proposed calibration techniques. Due to the high-resolution ADC, the input-referred noise is 2.52 μV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> with a gain of 28.5 dB.

Physical analysis of temperature-dependent effects of amplitude-modulated electromagnetic hyperthermia

Purpose: Preclinical studies and clinical observations suggest that amplitude modulation (AM) below 100 kHz may enhance the intratumoral power absorption of radiofrequency hyperthermia at 13.56 MHz; however, it remains unclear whether AM induces temperature-dependent effects.Methods: We established tumor models assuming typical tumor architectures or cell suspensions to analyze the effects of additional power dissipation. The preconditions for demodulation at cell membranes in situ were outlined. The bioheat transfer equation was solved analytically for the selected models and the possibility of circumscribed temperature increases (point heating) with dependency on the specific absorption rate (SAR) peaks was estimated for centimeter down to nanometer scales.Results: Very-low-frequency (VLF) AM radiofrequency can increase the SAR in the extracellular space or necrosis of tumors as compared to radiofrequencies alone. Such modulation-derived SAR peaks can induce higher temperatures (hot spots) in tumors with necrotic areas of millimeter to centimeter size. However, for lesions <1 cm, excessive (unrealistic) SAR > 1000, 10,000 and 1014 W/kg for diameters of ∼5 mm, ∼1 mm and ∼10 nm (nanoheating), respectively, would be required to explain the cell kill observed in pre-clinical and clinical data, even with VLF modulation.Conclusion: Our analysis suggests that VLF AM of radiofrequency hyperthermia for a theoretical tumor model cannot induce relevant temperature-dependent effects, as the associated temperature increases caused by the resultant SAR peaks are too small. Further investigation of possible non-temperature-dependent effects is recommended.

A Novel Class AB CMOS Operational Amplifier

A novel class AB two stage operational amplifier was presented to deal with the problem of the conventional class A two stage operational amplifier’s limited slew rate. The output stage quiescent current was controlled accurately and the slew rate and unity gain bandwidth were enhanced significantly, along with no additional static power dissipation. Simulation results show that the positive and negative slew rates were raised to 35 and 2.2 times and unity gain bandwidth was raised to 5 times when compared with conventional class A operational amplifier.

NBTI and Power Reduction Using a Workload-Aware Supply Voltage Assignment Approach

Supply voltage assignment (SVA) can alleviate the performance aging induced by the negative bias temperature instability (NBTI) effect. However, due to the random characteristic of an actual system workload, it is difficult to estimate the aging rate and control the supply voltage reasonably. To solve this problem, we present a workload-aware SVA method (WSVA) that encapsulates the workload change into the aging estimation using an LUT-based approach. Moreover, an NBTI and leakage co-optimization strategy based on an integer linear programming (ILP) approach is proposed to obtain the optimal input vector in standby mode. Simulation experiments on multiple benchmark circuits demonstrate that the LUT-based approach can track the dynamic change of the workload online and provide an accurate aging estimate for SVA with little computation cost. Compared with the SVA method without considering the workload, the proposed aging estimation approach and the optimal input vector selection strategy in the WSVA framework can enable the CMOS circuit conserve additional power dissipation while guaranteeing the performance requirements.

Energy efficiency improvement of a single-phase ac spot welding machine by using an advanced thyristor switched detuning capacitor bank

The operation of an ac spot welding load invokes serious power quality problems, such as voltage fluctuation, poor power factor, and harmonic distortion, resulting in additional power dissipation of the transformer and reducing in the operational energy efficiency. This paper proposes a fast reactive power compensating solution to improve the overall power quality of a single-phase ac spot welding machine by using an advanced thyristor switched capacitor (TSC) for detuning harmonic filtering and power factor correction bank. This study evaluates the specific improvement results regarding power dissipation, harmonic loss factor, maximum permissible load current, and top-oil temperature rise of the transformer. Based upon the implementation and experimental results, it shows that the proposed solution can effectively improve the operational energy efficiency as well as the power quality of the system. From the calculated curves, the improvement results with different TSC capacities under different operation conditions can be estimated.

A Simple Miller Compensation With Essential Bandwidth Improvement

A novel technique for adaptive frequency compensation in negative feedback amplifiers is proposed. It is demonstrated that a simple reconnection of the compensation capacitor in a two-stage Miller op-amp leads to a pseudoconstant bandwidth for a moderate range of closed-loop gains, without requiring additional power dissipation or extra silicon area. Also, an improvement of power-supply rejection ratio is obtained. The presented technique has been applied to a non-inverting amplifier, which has been fabricated in a 0.18- $\mu \text{m}$ CMOS process. Measurement results validating the proposed compensation scheme are provided.

Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs

In this paper, we present a comprehensive study on the impact of power delivery network (PDN) on full-chip wirelength, routability, power, and thermal effects in gate-level monolithic 3-D (M3-D) ICs across different technology nodes. Our studies show that PDN worsens routing congestion more severely in M3-D ICs than in 2-D designs due to the significant reduction in resources for 3-D connections. The relative impact worsens at advanced technology nodes due to higher congestion of interconnects. The increase in signal wirelength translates into additional net switching power dissipation, which significantly contributes to total power. This in turn aggravates thermal issues further in 3-D ICs. In addition, we observe that PDN tradeoffs among wirelength, power, and thermal are more pronounced in M3-D ICs than through silicon via-based 3-D and 2-D designs because of the higher integration density and the severe competition between signal and power connections. We also compare the impact of PDN on full chip routing in M3-D ICs versus face-to-face 3-D ICs. Lastly, we use various PDN design optimization techniques for M3-D ICs at different nodes and obtain up to 13.9% signal wirelength and 17.6% total power reduction under the given IR drop budget.

An RHBD Bandgap Reference Utilizing Single Event Transient Isolation Technique

A novel radiation-hardened-by-design (RHBD) structure to reduce the single event transient (SET) amplitude in analog circuits is presented in this paper. This structure features an SET isolation technique, which contains a sensor and a switch. The sensor turns off the switch when it detects a voltage transient at the sensitive node, in which case the core circuit is temporarily isolated from the output. Once the voltage at the sensitive node recovers, the sensor turns on the switch again in order to connect the core circuit to the output. This RHBD technique was validated based on a typical bandgap reference circuit, which was fabricated in the IBM 130 nm technology. The simulation results demonstrated a significant reduction in the SET amplitude, which was further verified with the pulsed laser. The additional sensor and the switch in the circuit only produce a minor amount of additional power dissipation if they are properly chosen. The area overhead is rendered negligible by means of selecting the appropriate sizes of transistors for the RHBD structure.

Frequency tuning with RFQ temperature in China ADS Injector II**Supported by National Natural Science Foundation of China (91026001)

A 162.5 MHz four-vane radio frequency quadruple (RFQ) accelerator has been developed at the Institute of Modern Physics (IMP) for Injector II of the China ADS linac. The RFQ will operate in continuous wave mode at 100 kW. For the designed 10 mA beam, the additional RF power dissipation will induce a very large reflection of power. A water-temperature controlling system will be used to reduce the power reflection by tuning the frequency of the RFQ. The tuning capability of the water temperature is studied under different configurations of cooling water. Simulations and experiment are compared in this paper. The experimental results agree well with simulation using ANSYS. This can be used as a reference to tune the RFQ in beam commissioning.

Transconductance and slew rate improvement technique for current recycling folded cascode amplifier

A proposed technique to achieve transconductance and slew rate improvement of current recycling folded cascode amplifier is presented in this paper. It adopts the local common-mode feedback structure to increase gain-bandwidth, dc gain and slew rate of conventional recycling current amplifiers with no additional power dissipation. A proposed amplifier based on this technique is simulated on UMC 180nm process. The simulation results demonstrate that the proposed amplifier achieves a 200% gain-bandwidth, 10dB dc gain and 100% slew rate improvement with the same power dissipation when compared to the conventional current recycling counterparts.

Wide-Air-Gap Transformer Model for the Design-Oriented Analysis of Contactless Power Converters

A wireless power converter topology with a small size and a high conversion efficiency has an increasing demand on small-power applications. Some design techniques to transmit power by customized cores have been already developed. However, when transferring energy by wide-gap transformers employing small-sized commercialized cores, the power losses on the winding greatly increase as the frequency increases. Then, the efficiency of the contactless power system decreases significantly due to the conduction loss and reactive components in the resonant circuit. Even though series-parallel resonant converters are largely employed, which can provide an infinite shunt impedance regardless of the coupling coefficient, when a commercialized core is employed for loosely coupled contactless power transfer applications, the large leakage inductance of the transformer significantly influences the additional power dissipation on the transformer windings. In this paper, an operating principle on how the contactless transformer with commercialized core contributes to the low efficiency is discussed. Also, a new frequency-dependent R- L ladder circuit model is introduced for the design-oriented analysis of wide-air-gap contactless power converters including the frequency-dependent losses of the transformer. A new design procedure with the proposed model is suitable for the contactless transformers employing commercialized cores. The proposed design approach is validated by 98.8-W hardware experiments. Finally, the simulation waveforms and the hardware results are compared to verify the accuracy of the frequency-dependent transformer model.

A new wideband regulated cascode amplifier with improved performance and its application

This paper presents a new high frequency Regulated Cascode (RGC) amplifier with improved performance. The split-length compensation technique is used to increase both the bandwidth and output impedance, and decrease the input impedance of the conventional RGC. The bandwidth of the proposed RGC amplifier is 5.81GHz, which is about 2.7GHz larger than that of simple one. The improved performance of the introduced circuit is achieved with no additional passive element and DC power dissipation. In the paper, output impedance and bandwidth of the proposed circuit are derived by using small signal analysis and have also been compared with the traditional one. In addition, a wideband high performance current mirror is designed in the work as an application of the proposed RGC structure. The bandwidth extension ratio (BWER) of the modified wideband current mirror is 1.37. The proposed circuits are designed by using TSMC 0.18µm CMOS process and BSIM3 Level 49 device model. The circuits are simulated on Spectre simulator of Cadence to validate the analytical results obtained in the paper.