Adaptive Golomb-Rice Research Articles

Memory-efficient sensor data compression

We treat scalar data compression in sensor network nodes in streaming mode (compressing data points as they arrive, no pre-compression buffering). Several experimental algorithms based on linear predictive coding (LPC) combined with run length encoding (RLE) are considered. In entropy coding stage we evaluated (a) variable-length coding with dynamic prefixes generated with MTF-transform, (b) adaptive width binary coding, and (c) adaptive Golomb-Rice coding. We provide a comparison of known and experimental compression algorithms on 75 sensor data sources. Compression ratios achieved in the tests are about 1.5/4/1000000 (min/med/max), with compression context size about 10 bytes.

Efficient lossless compression scheme for multi-channel ECG signal processing

Electrocardiogram (ECG) represents the recording of the heart’s electrical activity and is used to diagnose heart disease nowadays. The diagnosis requires huge time consumption for acquiring enough multi-channel data. The storage and transmission of 12 lead ECG data results in massive cost. In this work, we propose a multi-channel ECG lossless compression which uses the adaptive linear prediction for intra and inter channel decorrelation. We also use the adaptive Golomb-Rice codec for entropy coding. The proposed technique for adaptive linear prediction and Golomb-Rice codec is based on the performance of passed samples. Thus, the coefficient of linear prediction and Golomb-Rice codec will make self-adjustments during the process. We evaluate the proposed algorithm with MIT-BIH Arrhythmia database for single-channel compression, and Physikalisch-Technische Bundesanstalt database (PTB) for multi-channel compression. The overall compression scheme is also implemented in embedded system with an ARM Cortex-M4 processor for real-time demonstration.

Lossless CFA Image Compression Chip Design for Wireless Capsule Endoscopy

This paper presents a hardware-oriented lossless color filter array (CFA) image compression algorithm for very-large-scale integration (VLSI) circuit design. In order to achieve high performance, low complexity and low memory requirement, a novel lossless CFA image compression algorithm based on JPEG-LS is proposed for the VLSI implementation. A previous study showed the usage of a context table with its memory consuming more than 81% of the chip area for a JPEG-LS encoder design. The proposed algorithm implements a JPEG-LS-based lossless image compression algorithm that eliminates the use of the context technique and its memory in order to reduce the chip area while still maintaining its high performance. The proposed algorithm includes a pixel restoration, an adaptive Golomb-Rice parameter prediction and an improved Golomb-Rice coding technique. This paper was realized using a 0.18μ m CMOS process with synthesized gate counts and core area of 4.8 k and 57,625μm 2 , respectively. The synthesized operating frequency of this design reached 200 MHz by using a pipeline scheduling technique. Compared with the previous JPEG-LS-based designs, this paper reduced the gate count to at least 28% and increased the average compression ratio by over 17.15% using the video endoscopy images from the Gastro Gastroenterologist Hospital.

고해상도 영상의 효과적인 처리를 위한 블록 버퍼 기반의 저 복잡도 무손실 프레임 메모리 압축 방법

본 논문에서는 고해상도 영상의 효과적인 처리를 위한 블록 버퍼 기반의 저 복잡도 무손실 프레임 메모리 (frame memory) 압축 방법을 제안한다. 제안하는 압축 방법은 공간적 상관도를 제거하기 위하여 블록단위 MHT (modified Hadamard transform)를 사용하고, 엔트로피 부호화를 위하여 AGR (adaptive Golomb-Rice) 부호화 기법을 적용하여 저 복잡도 무손실 압축 및 효과적인 하드웨어 구현을 달성한다. MHT는 가산기와 1비트 오른쪽 시프트(1-bit right shift) 연산만으로 구성되어 있고, AGR은 별도의 메모리 공간 및 메모리 접근 동작(memory access operation)을 포함하지 않아 저 복잡도 구현이 용이하다. 기존의 저 복잡도 무손실 압축 방법과 비교하여 제안한 알고리즘은 압축률 측면에서 우수한 성능을 나타내고, 기존 코덱(codec)의 구조를 크게 수정하지 않으면서 화질의 열화없이 하드웨어 장치에 적용될 수 있음을 다양한 영상에 대한 실험 및 복잡도 분석을 통해 보인다. 또한 제안한 방법은 메모리 접근 동작을 필요로 하지 않아 하드웨어 구현을 위한 비용을 최소화 할 수 있어, Fill HD급 이상의 고해상도 영상을 효과적으로 처리하는데 유용하다. This study addresses a low complexity and lossless frame memory compression algorithm based on block-buffer structure for efficient high resolution video processing. Our study utilizes the block-based MHT (modified Hadamard transform) for spatial decorrelation and AGR (adaptive Golomb-Rice) coding as an entropy encoding stage to achieve lossless image compression with low complexity and efficient hardware implementation. The MHT contains only adders and 1-bit shift operators. As a result of AGR not requiring additional memory space and memory access operations, AGR is effective for low complexity development. Comprehensive experiments and computational complexity analysis demonstrate that the proposed algorithm accomplishes superior compression performance relative to existing methods, and can be applied to hardware devices without image quality degradation as well as negligible modification of the existing codec structure. Moreover, the proposed method does not require the memory access operation, and thus it can reduce costs for hardware implementation and can be useful for processing high resolution video over Full HD.

Onboard Image Processing System for Hyperspectral Sensor.

Onboard image processing systems for a hyperspectral sensor have been developed in order to maximize image data transmission efficiency for large volume and high speed data downlink capacity. Since more than 100 channels are required for hyperspectral sensors on Earth observation satellites, fast and small-footprint lossless image compression capability is essential for reducing the size and weight of a sensor system. A fast lossless image compression algorithm has been developed, and is implemented in the onboard correction circuitry of sensitivity and linearity of Complementary Metal Oxide Semiconductor (CMOS) sensors in order to maximize the compression ratio. The employed image compression method is based on Fast, Efficient, Lossless Image compression System (FELICS), which is a hierarchical predictive coding method with resolution scaling. To improve FELICS’s performance of image decorrelation and entropy coding, we apply a two-dimensional interpolation prediction and adaptive Golomb-Rice coding. It supports progressive decompression using resolution scaling while still maintaining superior performance measured as speed and complexity. Coding efficiency and compression speed enlarge the effective capacity of signal transmission channels, which lead to reducing onboard hardware by multiplexing sensor signals into a reduced number of compression circuits. The circuitry is embedded into the data formatter of the sensor system without adding size, weight, power consumption, and fabrication cost.

A Low-Complexity Embedded Compression Codec Design With Rate Control for High-Definition Video

A hardwired design of embedded compression engine targeting the reduction of full high-definition (HD) video transmission bandwidth over the wireless network is developed. It adopts an intra-coding framework and supports both lossless and rate-controlled near lossless compression options. The lossless compression algorithm is based on a simplified Context-Based, Adaptive, Lossless Image Coding (CALIC) scheme featuring pixelwise gradient-adjusted prediction and error-feedback mechanism. To reduce the implementation complexity, an adaptive Golomb-Rice coding scheme in conjunction with a context modeling technique is used in lieu of an adaptive arithmetic coder. With the measures of prediction adjustment, the near lossless compression option can be implemented on top of the lossless compression engine with minimized overhead. An efficient bit-rate control scheme is also developed and can support rate or distortion-constrained controls. For full HD (previously encoded) and nonfull HD test sequences, the lossless compression ratio of the proposed scheme, on average, is 21% and 46%, respectively, better than the Joint Photographic Experts Group-Lossless Standard and the Fast, Efficient Lossless Image Compression System (FELICS) schemes. The near lossless compression option can offer additional 6%–20% bit-rate reduction while keeping the Peak Signal-to-Noise Ratio value 50 dB or higher. The codec is further optimized complexity-wise to facilitate a high-throughput chip implementation. It features a five-stage pipelined architecture and two parallel computing kernels to enhance the throughput. Fabricated using the Taiwan semiconductor manufacturing company 90-nm complementary metal-oxide–semiconductor technology, the design can operate at 200 MHz and supports a 64 frames/s processing rate for full HD videos.

Hardware-Efficient Low-Power Image Processing System for Wireless Capsule Endoscopy

This paper presents the design of a hardware-efficient, low-power image processing system for next-generation wireless endoscopy. The presented system is composed of a custom CMOS image sensor, a dedicated image compressor, a forward error correction (FEC) encoder protecting radio transmitted data against random and burst errors, a radio data transmitter, and a controller supervising all operations of the system. The most significant part of the system is the image compressor. It is based on an integer version of a discrete cosine transform and a novel, low complexity yet efficient, entropy encoder making use of an adaptive Golomb-Rice algorithm instead of Huffman tables. The novel hardware-efficient architecture designed for the presented system enables on-the-fly compression of the acquired image. Instant compression, together with elimination of the necessity of retransmitting erroneously received data by their prior FEC encoding, significantly reduces the size of the required memory in comparison to previous systems. The presented system was prototyped in a single, low-power, 65-nm field programmable gate arrays (FPGA) chip. Its power consumption is low and comparable to other application-specific-integrated-circuits-based systems, despite FPGA-based implementation.

A low complexity and lossless frame memory compression for display devices

In this paper, we introduce a new low complexity and lossless algorithm based on subband decomposition with the modified Hadamard transform (MHT) and adaptive Golomb-Rice (AGR) coding for display devices. The main goal of the proposed method is to reduce memory requirement for display devices. A basic unit of the proposed method is a line of the image so that the method is processed line by line. Also, MHT and AGR coding are utilized to achieve low complexity. The major improvement of the method is from the use of AGR and subband processing compared with exiting methods which are similar to the method in terms of complexity and applications. Simulation results show that the algorithm achieves a superior compression performance to the existing methods. In addition, the proposed method is hardware-friendly and could be easily implemented in any display devices.