Adaptive Decision Feedback Equalizer Research Articles

A 16-Gb/s 3-tap adaptive DFE in 12-nm FinFET CMOS technology

This paper introduces a 3-tap half-rate adaptive decision feedback equalizer (DFE) and a 2-D eye-opening monitor (EOM). A newly developed regenerating sampler (RG-sampler) with smaller setup time and ck2q time is integrated into the proposed DFE, enhancing its performance. To ensure greater robustness, the sign-sign least-mean-squares (SSLMS) algorithm with a pattern filter is employed to adapt DFE tap coefficients. The proposed 2-D EOM accurately captures the shape of the eye diagram using adjustment steps of 1.95ps and 7 mV in the horizontal and vertical directions, respectively. Additionally, by reusing analog components within the adaptive DFE and 2-D EOM modules, significant reductions in silicon area and power consumption are achieved. Implemented in 12-nm FinFET CMOS technology, the transceiver integrated with adaptive DFE and 2-D EOM operates at a data rate of 16 Gb/s over a channel with 30 dB loss at 8 GHz frequency. The proposed adaptive DFE and 2-D EOM occupy a total area of 0.00808 mm2. Measurement results demonstrate that following DFE adaptation, the eye height is 77 mV, and the eye width is 29.25ps at 16 Gb/s.

A sparse adaptive decision feedback equalization approach for the high data rate vertical underwater acoustic communication in deep sea

In underwater acoustic communication (UWAC) environments, multichannel decision feedback equalizer (MDFE) techniques combined with single carrier modulation schemes are widely employed to suppress multipath interference while adapting to time-varying channel response. While MDFE is a powerful technique, the estimation of the numerous filter taps is generally complex problem, and the numerically complexities can lead to the instability of solutions including the occurrence of the burst errors. In this study, we propose a method that introduces L1-norm regularization into the adaptive algorithm of MDFE, considering a sparse channel response environment in the vertical UWAC channel in deep-sea areas. We applied the proposed method to simulation and experimental data, comparing it with conventional methods. As a result, the proposed method demonstrated a clear improvement in bit error rate performance, obtaining sparse filter coefficient estimates and effectively suppressing burst errors.

A 0.061-pJ/b/dB 28-Gb/s Gradient-Based Maximum Eye Tracking CDR With 2-Tap DFE Adaptation in 28-nm CMOS

This brief presents a gradient-based maximum eye tracking (GMET) scheme employed in the forwarded-clock receiver, including baud-rate clock and data recovery (CDR) and 2-tap adaptive decision feedback equalization (DFE). By optimizing the widely used gradient ascent method for robust operation, GMET achieves low computational power and high stability. Also, simultaneous adaptation using the unified algorithm enables low power consumption and low design complexity. Compared with the previous baud-rate CDR, superior performance is demonstrated under high-loss conditions. The prototype receiver is fabricated in 28-nm CMOS and occupies an active area of 0.106 mm2. At the data rate of 28 Gb/s, the receiver consumes 47 mW, corresponding to an energy efficiency of 1.68 pJ/b. Furthermore, with a channel loss of 27.7 dB at the Nyquist frequency, joint operation of the CDR and the DFE adaptation offers measured results with a margin of 0.17 unit interval (UI) at a BER lower than 10-12.

Multiple-Input-Multiple-Output Filtered Multitone Time Reversal Acoustic Communications Using Direct Adaptation-Based Turbo Equalization

This paper proposes using direct adaptation (DA)-based turbo equalization in multiple-input-multiple-output (MIMO) filtered multitone (FMT) time reversal (TR) acoustic communications to jointly suppress noise, residual co-channel interference (CCI) and intersymbol interference (ISI) after the TR process. Soft information-based adaptive decision feedback equalization (ADFE) adjusted according to the recursive expected least squares (RELS) algorithm, including interference cancellation and decoding, is used to construct the DA-based turbo equalization. In the proposed method, soft information is exchanged between soft symbols with soft decisions of decoding iteratively, and interference suppression is proceeded successively and iteratively until the performance is stable. The principle of the proposed method is analyzed, and based on the acoustic channel responses measured in a real experiment, the performance is assessed in relation to that of anther two methods. Compared with the MIMO-FMT TR underwater acoustic communication using interference suppression without error control coding (ECC), the proposed method performs better, benefitting from the ECC included in turbo equalization. Additionally, compared with the MIMO-FMT TR underwater acoustic communication using interference suppression based on hard decision equalization and decoding, the proposed method exhibits superior performance by exploiting soft information.

A PAM4 transceiver design scheme with threshold adaptive and tap adaptive

To meet the demand of low bit error rate and high bandwidth for high-speed links, a reliable 112 Gb/s four-level pulse amplitude modulation (PAM4) transceiver design scheme with adaptive threshold voltage and adaptive decision feedback equalizer is proposed in this paper. In this scheme, three continuous time linear equalizers (CTLEs) at the front end of receiver are used to compensate the high-frequency, mid-frequency and low-frequency signals, respectively, and the variable gain amplifier (VGA) and saturation amplifier (SatAmp) are used to scale the signal amplitude. In addition to the three data samplers, four auxiliary samplers are also used for threshold adaptation. The sign-sign least mean squares algorithm uses the offset between the data sampler and the auxiliary sampler at the receiver side to drive the auxiliary reference voltage to converge to the signal constellation level, thus ensuring that the eye diagram of the PAM4 received signal has equal spacing and a constant signal–noise ratio for the three eyes in the vertical direction. In addition, the adaptive DFE for PAM4 signaling allows the transceiver to better adapt to the channel and thus achieve better equalizer performance. The simulation results show that the PAM4 transceiver design can compensate up to 25 dB of channel loss with an average eye height of 59.6 mv and an average eye width of 0.27 UI at a bit error rate of 10−12 under the condition of 3-tap feedforward equalizer (FFE) transmitter.

A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS

This article presents a 48-Gb/s four-level pulse amplitude modulation (PAM-4) receiver with a Baud-rate clock and data recovery (CDR) suitable for multi-level signaling. By deriving the relation between the vertical eye margin (VEM) and the ratio of main-cursor to pre-cursor, the proposed Baud-rate phase detector (BRPD) adjusts the pre-cursor and finds the lock point with targeted vertical eye opening. Thus, the BRPD offers a unique lock point when used with an adaptive decision feedback equalizer (DFE) where post-cursor <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$h_{1}$</tex-math> </inline-formula> is removed. Otherwise, the lock point could drift with the conventional Mueller–Müller phase detector (PD). Furthermore, a summer loading of the DFE reduces the input loading of the DFE by embracing the RZ sampler output instead of the conventional NRZ output, which adds to the delay associated with an RS latch. A prototype chip fabricated in 40-nm CMOS technology consists of an analog front-end (AFE), a phase rotator (PR), a current digital-to-analog converter (DAC), and synthesizable digital logic (SDL), occupying a total active area of 0.24 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> . The proposed PAM-4 receiver achieves a bit-error rate (BER) of less than 10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-11}$</tex-math> </inline-formula> at 48 Gb/s and offers an energy efficiency of 2.42 pJ/b.

Research on Co-Channel Interference Cancellation for Underwater Acoustic MIMO Communications

Multiple-input–multiple-output (MIMO) communication systems utilize multiple transmitters to send different pieces of information in parallel. This offers a promising way to communicate at a high data rate over bandwidth-limited underwater acoustic channels. However, underwater acoustic MIMO communication not only suffers from serious inter-symbol interference, but also critical co-channel interference (CoI), both of which degrade the communication performance. In this paper, we propose a new framework for underwater acoustic MIMO communications. The proposed framework consists of a CoI-cancellation-based channel estimation method and channel-estimation-based decision feedback equalizer (CE-DFE) with CoI cancellation functionalities for underwater acoustic MIMO communication. We introduce a new channel estimation model that projects the received signal to a specific subspace where the interference is free; therefore, the CoI is cancelled. We also introduce a CE-DFE with CoI cancellation by appending some filters from traditional CE-DFE. In addition, the traditional direct adaptive decision feedback equalization (DA-DFE) method and the proposed method are compared in terms of communication performance and computational complexity. Finally, the sea trial experiment demonstrates the effectiveness and merits of the proposed method. The proposed method achieves a more than 1 dB of output SNR over traditional DA-DFE, and is less sensitive to parameters. The proposed method provides a new approach to the design of robust underwater acoustic MODEM.

Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector

This article presents design techniques for a PAM-4 baud-rate digital clock and data recovery (CDR) circuit utilizing a stochastic phase detector (SPD). The proposed baud-rate phase detector (PD) is designed in an inductive and stochastic way, so there is a clear difference from the existing deductive and logical method used in sign-sign Mueller–Müller PD (SS-MMPD), a representative baud-rate PD. By collecting the histograms of the sequential PAM-4 patterns under EARLY and LATE sampling phases and calculating optimal weights, the SPD exhibits optimized phase-locking characteristic that maximizes the PAM-4 vertical eye opening (VEO) compared with the conventional logical approaches. In addition, unlike SS-MMPD, which may suffer from a severe multiple-locking problem, the SPD tracks a unique and optimal sampling phase even with an adaptive decision-feedback equalizer (DFE). For verification, a prototype PAM-4 receiver is fabricated in 40-nm CMOS technology and occupies 0.24 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Tested with PRBS-7 patterns, it achieves a bit error rate (BER) of less than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-11}$ </tex-math></inline-formula> and energy efficiency of 2.4 pJ/b at 48 Gb/s.

Implementation Adaptive Decision Feedback Equalizer for Time-Reversal Communication in Shallow Water Environment

Underwater wireless communications are growing very fast along with human needs for applications such as defense, state security, underwater control and monitoring systems. Until now, an acoustic signal is a practical way to achieve long distance communication in the ocean. However, the underwater acoustic channel faces many challenges including limited available bandwidth, long delays, time-variability, and Doppler-spread. These challenges can reduce the reliability of the communication system and the achievement of high data-rate becomes a challenge. Adaptive decision feedback equalization is a method to compensate for the distortion of information signals on the underwater acoustic channel. On the other hand, time reversal is an effective method of overcoming intersymbol interference (ISI) problems which is the effect of multipath phenomena in underwater channels. Spatial focusing on time reversal can reduce the co-existing system disturbances and its temporal focusing makes the received power concentrated within a few taps so that the equalizer design work becomes much simpler. The temporal focusing can also increase the transmission rate. This paper shows that the combination of time reversal and adaptive DFE (TR-DFE) has superior performance than TR and DFE itself. By modifying the step-size parameters in the adaptive DFE, the TR-DFE level of convergence and performance can be improved. The geometry-based modeling which is used proves that distance and multipath variation greatly affect the quality of time reversal communication on the underwater acoustic channel.

Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer

In this paper, a low-complexity pipelined adaptive FIR filter is designed using Distributed Arithmetic (DA) architecture for signal processing applications. Generally adaptive filters will occupy more area and power consumption because of using memories in the filters for partial product (PP) generation. To get rid of this, We use the pipeline concept to reduce the registers in the filters and also to reduce the area further compressor adders are used in the adaptive filter architectures instead of using normal adders. With these two concepts the area and power consumption of the adaptive filters will be reduced. The proposed design is coded in Verilog HDL language and synthesized in Synapsis design compiler tool with SAED 90 nm technology for finding the area, power, minimum sampling period, maximum sampling frequency, area delay product (ADP), power delay product (PDP). By using proposed adaptive filter we can design and implement higher order filters more easily and also the complexity of the proposed design is very less when compared with the existing designs. When we observe the synthesis results the proposed design will occupy 30% less area when compared with the two memories based existing architecture. Also the power consumption is 25% less when compared with the block based adaptive filters. The ADP and PDP of the proposed design is very less when compared with existing architectures. The proposed design is well suited for signal processing application designs such as adaptive decision feed back equalizers for removing the signal noises and inter symbol interference, hearing aids, ECG signal analysis and software defined radio.

Silica Microsphere WGMR-Based Kerr-OFC Light Source and Its Application for High-Speed IM/DD Short-Reach Optical Interconnects

Kerr optical frequency combs (OFCs) based on silica microsphere whispering gallery mode resonator (WGMR) have various applications where they are used as a light source. For telecommunication purposes, WGMR-based Kerr-OFC comb generators can be physically realized using silica microsphere resonators and can be used to replace multiple laser arrays. In such a realization, these novel light sources have the potential to demonstrate an attractive solution for intra-datacenter interconnects (DCI). In this paper, we show an experimental demonstration of a silica microsphere WGMR-based Kerr OFC light source where newly generated 400 GHz spaced carriers together with powerful linear equalization techniques, such as a linear symbol-spaced adaptive decision-feedback equalizer (DFE) with feed-forward (FF) and feedback (FB) taps, provide an alternative to individual lasers ensuring low-cost and low-complexity IM/DD scheme for the transmission of NRZ-OOK modulated signals at data rates up to 50 Gbps/λ over 2 km SMF link. Finally, we demonstrate a record 50 Gbps per λ transmission of NRZ-OOK modulated signals with a novel silica microsphere WGMR-based Kerr-OFC as a light source operating in the optical C-band, surpassing the previously demonstrated data rate record by five times.

Joint time-frequency domain equalization of MSK signal over underwater acoustic channel

Minimum shift keying (MSK) shows better bandwidth efficiency than the phase shift keying owing to its high bandwidth usage efficiency and constant envelope property. The performance of frequency-domain block linear equalization (FD-BLE), which is commonly used for MSK communication, is limited in complex time-varying underwater acoustic (UWA) channel. In this paper, a time-domain adaptive decision feedback equalization (TD-ADFE) is proposed to address issues pertaining to MSK communications over UWA channel. Further joint time–frequency domain equalization (JTFDE) built on TD-ADFE and BLE is proposed to further reduce the bit error rate (BER). The proposed method can effectively track the time-varying UWA channel through the updated equalizer coefficient according to the output of de-mapper. Numerical simulation shows that the JTFDE performed better than TD-ADFE and FD-BLE over time-varying UWA channel by approximately 2 dB when the BER was 1 × 10−3.The sea trial results verified the proposed JTFDE and demonstrated that the BER of JTFDE was 82.5% and 88.9% lower than that of TD-ADFE and FD-BLE, respectively.

Adaptive decision feedback equaliser based on sparse incremental least mean square/fourth approach

Adaptive decision feedback equaliser based on sparse incremental least mean square/fourth approach

A 28-nm CMOS 11.2-Gbps Receiver based on Adaptive CTLE and Adaptive 3-Tap DFE With Hysteresis Low-pass Filter

This paper proposes a receiver design incorporating both an adaptive continuous-time linear equalizer (CTLE) and an adaptive decision-feedback equalizer (DFE). The CTLE utilizes a merged rectifier and error amplifier, improving the DC gain and reducing the current consumption. Offset cancelation of the CTLE is performed by adaptively adjusting the load resistance of a CTLE cell. The DFE adopts the technique of using a slave latch behind a current summer for the relaxed timing constraint but excludes other auxiliary circuits that perform a master-latch function. The proposed low-pass filter with a hysteresis can suppress the oscillation of the DFE tap coefficients and the data level in the steady state. Fabricated in 28-nm CMOS process, the prototype receiver shows that the measured BER is less than 10<SUP>-14</SUP> at 10.4 Gb/s for an 18-inch FR4 trace and at 11.2 Gb/s for a 12-inch FR4 trace, respectively, with both the adaptive CTLE and the adaptive DFE activated. Operating at 11.2 Gb/s, the energy efficiency of the receiver is 5.36 pJ/bit.

A new approach for designing and implementing ADF equalization for 5G frequency selective channel based on two operating phases of LS and RLS algorithms

In this paper, a new approach is proposed for implementing an adaptive decision feedback equalizer (ADFE) for the 5G channel. The proposed equalizer works in two phases. In the first phase, a least-squares (LS) algorithm with a variable-length training sequence is used to estimate the coefficients of the channel and the equalizer. In the second phase, the recursive least-squares algorithm estimates the channel and adapts the equalizer, jointly. According to the channel quality, a variable-length training sequence is used to estimate the channel vector and the coefficients of the equalizer. The feed-forward equalizer (FFE) compensates the effects of the transmitting filter and the channel filter. No matched filter is used in the receiver. The noise samples at the input of the proposed FFE are independent. The noise enhancement of the proposed FFE is less than the noise enhancement of its corresponding one in the conventional ADFE. The overall filtering response (OFR) from the input of the transmitting filter to the output of the FFE is calculated and used to estimate the coefficients of the feedback equalizer (FBE). The channel model, the FFE coefficients, the OFR vector, and the FBE coefficients are continuously updated every symbol period. Using a variable training sequence increases the bandwidth efficiency of the transmitted signal. Simulation results and real-time implementation measurements show that the convergence time and the steady-state error at the output of the proposed equalizer are smaller than their corresponding values in the conventional ADFE.

A Distributed Arithmetic based realization of the Least Mean Square Adaptive Decision Feedback Equalizer with Offset Binary Coding scheme

A Least-Mean-Square (LMS) based Adaptive Decision Feedback Equalizer (ADFE) structure using Distributed Arithmetic (DA) is presented. The filtering and weight-updating operations of the Feed Forward Filter (FFF) and Feedback Filter (FBF) of the ADFE have been recast using DA framework in order to obtain efficient multiplierless realization. Unlike, the DA based realization of the fixed coefficient filter, in case of adaptive filters, the updating of partial-products from time to time is a difficult task. We proposed an efficient technique which uses an auxiliary memory to perform the weight-update operation. This memory is updated from time to time using a register which stores the newest sample of the filter input. The proposed architecture is hardware efficient in the sense that it uses no multiplier units and fewer adders compared to existing architecture. For instance, for an ADFE with FBF length is equal to 8, with proper choice of parameters in the DA structure, the proposed architecture uses around 20% less chip area and power compared to most recent architecture existing in the literature. Simulation results show that the convergence characteristics of the proposed DA based LMS ADFE is almost similar to conventional multiply-accumulate (MAC) based realization.

An 11.05 mW/Gbps Quad-Channel 1.25-10.3125 Gbps Serial Transceiver With a 2-Tap Adaptive DFE and a 3-Tap Transmit FFE in 40 nm CMOS

This paper presents a quad-channel 1.25-10.3125 Gbps wireline transceiver implemented in 40 nm CMOS technology. The transmitter consists of a bit width adjustment, a 40:2 multiplexer, a 2:1multiplexer, and a current-mode logic driver with a 3-tap feedforward equalizer. The receiver has a two-stage continuous-time linear equalizer, a 2-tap half-rate fully adaptive decision-feedback equalizer, a phase interpolation-based digital clock and data recovery (CDR) followed by a 2:40 demultiplexer, a bit width adaption. The transceiver also supports AC/DC coupling, CDR locking detection, PLL locking detection, loss of signal detection, automatic termination impedance calibration. A ring VCO-based PLL is designed in each lane to save power consumption, and a dual-core LC VCO-based PLL is implemented in each bank to generate a low jitter clock signal. At 10.3125 Gbps, the transceiver can equalize 28 dB Nyquist loss at a bit error rate of 10−12, and it consumes 114 mW with a 1.1 V supply. This work presents a high power efficiency of 11.05 mW/Gbps, and the transceiver is suitable for multi-standard applications due to its flexibility and power efficiency.

Compensation of frequency mismatch between transmitter and receiver local oscillators to enhance 5G-based radio-over-fiber transmissions

Radio-over-fiber is a cost-effective support for the forthcoming 5G developments aimed to fulfill the ever-increasing demand for information. However, such systems are limited by transmission impairments that reduce the quality of communication. To enhance the system performance, an adaptive decision-feedback equalizer based on the least mean square algorithm is proposed in this work to compensate for frequency mismatch in the transmitter and receiver local oscillators in a radio-over-fiber transmission scenario when considering the latest 5G New radio standard. Simulation results in MATLAB exhibit a major impact from the equalization technique in improving the system performance in the presence of such a frequency offset, allowing the optical link to be extended from ∼100 km with no equalizer up to ∼690 km after equalization. Thus, it was demonstrated that the proposed adaptive equalization technique is a promising contender to enhance 5G-based Radio-over-Fiber data transmissions.

Two Dimensional Adaptive Multichannel Decision Feedback Equalization for OTFS System

Orthogonal time-frequency-space (OTFS) modulation has shown significant error performance advantages over orthogonal frequency division multiplexing (OFDM) in time-varying channels. However, the symbols in OTFS frames still suffer from inter-Doppler interference (IDI) and inter-symbol interference (ISI). In this letter, we propose a two dimensional (2D) adaptive multichannel decision feedback equalizer (DFE) to combat the interference. The proposed receiver constructs the input signal and feedback signal of the DFE based on the characteristic of OTFS modulation. Meanwhile, by exploiting the sparsity feature of the channels in delay-Doppler domain, the iterative improved proportionate normalized least mean squares (IPNLMS) algorithm is employed to achieve fast convergence and fast tracking. The simulation results show that the proposed equalizer could achieve satisfied BER performance with lower complexity.

Adaptive two-stage nonlinear feedforward equalizer and decision feedback equalizer for a visible-light communication and ultra-large effective area pure silica fiber seamless integrated system

We proposed an adaptive two-stage nonlinear feedforward equalizer and decision feedback equalizer to minimize the negative influence of nonlinear distortions. A data rate of 960 Mbit/s is experimentally achieved on the guided visible-light transparent transmission over a 100-m ultra-large effective area pure silica fiber. The experimental results verified the effectiveness and improvement of the proposed method compared with the traditional feedforward post-equalizers.