Active Neutral Point Clamped Converter Research Articles

Three-level ANPC rectifier loss calculation and balance control method

Traditional three-level neutral-point clamped converter has the problem of the uneven loss distribution, which restricts the increase of converter capacity. Three-level active neutral-point clamped (3L-ANPC) converter can reduce the imbalance of power device loss distribution. At present, three traditional SPWM modulation strategies are used in single-phase three-level ANPC modulation. Considering the loss distribution, it is generally required to input the current and voltage sampling values in real-time and calculate the temperature of the switching device online for control or collect the temperature of the switching device in real-time for feedback control, which is more complicated to realize. This paper proposes a modulation scheme based on two carrier cycles, combined with traditional SPWM1 and 2, to analyze the switching conditions and loss characteristics of each switching device in this scheme. The simulation of a single-phase three-level ANPC rectifier was built, and the experiment was carried out on the Yuankuan HIL semi-physical platform. The results show that this scheme is simple, easy to implement, and can effectively reduce the loss distribution imbalance.

A Megawatt-Scale Si/SiC Hybrid Multilevel Inverter for Electric Aircraft Propulsion Applications

This paper presents the design and development of a megawatt-scale medium-voltage (MV) hybrid inverter prototype to validate its feasibility and potentials for the electric propulsion on the next-generation electric aircraft system with an onboard MV dc distribution, e.g., 3 kV dc bus in this work. The proposed hybrid converter consists of a three-level active-neutral-point-clamped (ANPC) stage using 3.3 kV silicon IGBTs cascaded with an H-bridge stage using cost-effective 1.2 kV SiC MOSFETs in each phase. Comprehensive design and evaluation of the full-scale prototype are elaborated, including the low-inductance busbar design, converter architecture optimization and system integration. In addition, a low computational cost space vector modulation with common-mode voltage (CMV) reduction feature is proposed to fully exploit the benefits of SiC MOSFET in this hybrid topology. Extensive simulation and experimental results are provided to demonstrate the performance of each power stage and the full converter assembly in both the steady-state operation and variable frequency operations. Compared with the widely adopted IGBT based ANPC converter in MV applications, the proposed 7-L hybrid inverter system features higher power efficiency, reduced harmonics, higher dc voltage utilization, reduced CMV and lower dv/dt, while remains cost effective compared to the solution using MV SiC MOSFETs.

Multiport Hybrid Converter for Electrified Transportation Systems

Compact and efficient power converter solutions are seen to be the backbone of future transportation systems in order to cope with the ongoing transition towards greener systems. Such systems usually comprise a main load section, in which one or more propulsion or traction motors are connected, in addition to an auxiliary load, which might comprise the hotels and air conditioning for example. This auxiliary load can be as low as 5-10% of the main load power. Therefore, it can be challenging to drive this power from a typical high power system that employs a medium voltage (MV) DC (MVDC) grid, which is typical in high power systems. In such MVDC-integrated systems, neutral point-clamped (NPC) and active NPC (ANPC) converters are commonly used, where the auxiliary load converter is over-rated in this case, resulting in a bulky and inefficient power system. Thus, in order to enable a lighter and efficient transportation power system, a multiport hybrid converter (MHC) is presented in this paper. This converter can feed the main MV motor, in addition to two auxiliary LV loads. Compared to the state-of-the-art ANPC converter, the proposed MHC utilizes only two extra switches per phase-leg in order to achieve this multiport operation along with increasing the voltage rating of another two switches. The proposed MHC is analysed in this paper, where its operation, modulation, and mathematical derivation are presented. These analyses are supported by simulation and experimental results utilizing a reduced-scale 5 kW system.

Low-Complexity Dual-Vector Model Predictive Control for Single-Phase Nine-Level ANPC-Based Converter

This article proposes a dual-vector finite-control-set model predictive control (FCS-MPC) with reduced complexity for a novel nine-level active neutral point clamped (ANPC) converter. This topology considerably reduces the used number of power switches compared to other topologies. Only nine power switches and two flying capacitors (FCs) are used to generate nine voltage levels. The proposed MPC scheme notably reduces the computational burden by directly locating the best two vectors without the need for multiple evaluations of the cost function as in the conventional method. Using one weighting factor in the cost function, three objectives are considered, namely, current tracking, FCs voltage control, and dc-link stabilization, reducing the heavy effort of coordinating weighting factors. Mathematical analyzes were carried out to determine the optimal duration of the selected voltage vectors. While the sequence of the two voltage vectors is identified based on the total harmonic distortion (THD) definition to minimize its value. Compared with standard FCS-MPC, lower steady-state errors, lower THDs, better harmonic distribution, and shorter execution times are achieved. The proposed MPC method is validated and compared with other prior-art control methods through experimental implementation.

Five-Level Switched-Capacitor ANPC Inverter With Output Voltage Boosting Capability

This article proposes a three-phase five-level switched-capacitor active neutral point clamped converter, which can be characterized by voltage boost ability, low-voltage stress across semiconductor devices, and balance of floating capacitor voltage without any auxiliary circuits and/or sensors. Operating principles and modulation scheme of the proposed converter, as well as a comparative analysis with similar topologies are included. Simulation and experimental results for a three-phase prototype are given to demonstrate the feasibility of the proposed five-level converter.

Matrix-Based Approach for Open-Circuit Fault-Tolerant Analysis and PWM Design of Active Neutral-Point-Clamped Converters

Active neutral-point-clamped converter adds open-circuit fault-tolerant (OCFT) capability compared with the widely used original neutral-point-clamped (NPC) topology. However, such capability is hard to utilize due to difficulties in pulse-width modulation (PWM) design and the randomness of failure points, particularly in high-level converters. Current research mainly focused on low-level topologies with a limited number of fault scenarios; moreover, the analysis and design are performed in a nonsystematic way. In this article, the OCFT operations of active NPC (ANPC) converters with multiple fault switches are investigated and the systematic PWM design process is proposed. First, different matrices are proposed for the ANPC converters to capture the complicated topology information and achieve an exhaustive analysis of the topological redundancy. Then, a step-by-step process is proposed to derive the suitable OCFT PWM patterns. The five-level ANPC converter is investigated as an example. Its experimental results validate that the proposed approach can 1) properly predict the behavior of converters systematically so that the tolerable faults and intolerable can be identified during the design procedure, and 2) the inherent fault-tolerant capability of the five-level ANPC converter can be guaranteed through the proposed method, and 3) multiswitch open-circuit faults can be easily dealt with by implementing suitable carrier-based PWM schemes.

An Improved DPWM Method for Single-Phase Five-Level ANPC Converters With Switching Loss Reduction and Capacitor Voltage Balance

Neutral-point (NP) voltage and flying capacitor (FC) voltage balance, and power loss reduction are important guarantees for the stable and high-efficiency operation of single-phase five-level active neutral-point clamped (5L-ANPC) converters. However, little reports about capacitor voltage balancing with the power loss reduction have been proposed for single-phase 5L-ANPC converters. In order to obtain the above merits, an improved discontinuous pulsewidth modulation (DPWM) method with capacitor voltage balance and power loss reduction is proposed. First, an optimized common-mode voltage is injected into the modulation waves to decrease the switching loss in each switching period. In particular, the calculation of the injected common-mode voltage is based on the analysis of the deviation of the NP voltage. Hence, a fast-dynamic response of the real-time NP voltage controlling is acquired in the meantime. Besides, in order to balance the FC voltage, the weight factors of NP voltage deviation and FC voltage deviation are compared to generate the selecting signals of redundant switching states. As a result, the capacitor voltage balance and power loss reduction are realized simultaneously. Finally, the simulation and experimental results validate the correctness and feasibility of the proposed DPWM method.

Computationally Efficient Model Predictive Control With Fixed Switching Frequency of Five-Level ANPC Converters

This article proposes a fixed switching frequency (FSF)-based improved model predictive control (MPC) for a five-level active neutral-point clamped (5L-ANPC) converter. Compared to the conventional MPC for 5L-ANPC converter, the proposed MPC significantly reduces the computational burden while ensuring the balance of dc-link and flying capacitor voltages. The proposed MPC optimally selects the control voltage vectors to reduce common mode voltage (CMV), leading to a small CMV of the converter. Using three voltage vectors action per control cycle in MPC, FSF is achieved. Steady-state and dynamic performances of the proposed MPC have been evaluated by experiments. The results verify the feasibility and effectiveness of the proposed MPC method.

A new design of active NPC converter topology with higher voltage gain for solar PV applications

In the low voltage applications, the high gain multilevel inverters has seen more visibility due to the improved harmonic profile with multilevel voltage as well as boosting feature. A boost active neutral point clamped (ANPC) multilevel inverter (MLI) configuration with reduced resource count has been proposed in this paper. The proposed MLI produces 11 levels (11L) voltage with the help of 12 switches of blocking voltage ratings lesser than the peak value of output voltages. For attaining the boosting of 2.5 in output voltage, 4 capacitors are used in the proposed MLI which are inherently self-balanced. The capacitors charging as well as discharging are done by implementing the simple logic of parallel/series connection with the active power DC source. The proposed MLI is implemented and tested in the laboratory at various operating conditions, and the corresponding results and discussion are presented.

A Highly Efficient Si-/SiC-Based Hybrid Active NPC Converter With a Novel Modulation Scheme

With the increasing demand for high-performance power electronic systems, the semiconductor device utilization has gained significant importance. This article proposes the Si/SiC devices based active neutral-point-clamped converter comprising SiC-based H-bridge structure. A novel pulsewidth modulation (PWM) scheme is also proposed that results in an effective utilization of the switching devices. In the proposed converter, the Si devices are soft-switched for all power-factor loading conditions. Therefore, high efficiency can be obtained even at high switching frequency operation with wide range of power factor values. Further, the conduction losses of the SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s are minimized by strategically selecting the switching states in such a way that the SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s conduct in parallel conduction paths during the null state operation. This leads to further enhanced efficiency. This article presents the detailed operating principle of the proposed topology operated with the presented PWM scheme. Moreover, a device loss analysis is presented to evaluate the conduction and switching losses of the proposed topology. The presented experimental results validate the performance parameters of the proposed topology with the proposed PWM scheme. Finally, the proposed PWM scheme is compared with the existing PWM schemes using efficiency values of the proposed and some of the prominent existing converter configurations.

High-Frequency GaN-Based ANPC Three-Level Converter as a Low-Noise Arbitrary PWL Voltage Generator

Recent advances in the technology of gallium nitride (GaN) power devices and high-frequency magnetic materials are key enablers of small, compact designs of power electronic converters in the megahertz range and the power range up to several hundreds of watts. However, impact of different switch modulation strategies along with the devices and magnetic materials must be carefully characterized to fully understand the boundaries of current technology and to be able to exploit it fully. This is usually performed through a holistic, automated design procedure based on multiobjective optimization which focuses on the converter efficiency and power density for the given electrical parameters. In this article, an optimized 100-W, 1.75-MHz switching frequency, four-quadrant, piecewise linear (PWL) arbitrary voltage generator based on active neutral-point-clamped (ANPC) three-level converter is presented. Diversity of modulation techniques for the hard-switched ANPC converter suitable for high-frequency (HF) applications are revisited, and impact on switching losses is characterized in detail. The generator is capable of providing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm {\mathrm {100}}~\text {V}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm {\mathrm {1}}~\text {A}$ </tex-math></inline-formula> at the output, with tracking speeds up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2~\text {V/}\mu \text {s}$ </tex-math></inline-formula> and steady-state efficiency above 95% with a physical size less than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$12~\text {cm}^{2}$ </tex-math></inline-formula> . Thermal management of the system is successfully resolved using advanced cooling plates based on pyrolytic graphite sheets (PGSs) and forced air convection. Having these characteristics, the presented generator outperforms the existing linear and hybrid power amplifiers (LPA/HPA) from the literature.

An enhanced implementation of SRF and DDSRF-PLL for three-phase converters in weak grid

Abstract Renewable energy generation systems connected to utility grid require perfect synchronization to grid which is one of the most important issues that needs to be taken into consideration. This paper proposed a hardware-accelerated implementation for the decoupled double synchronous reference frame phase-locked loop (DDSFR-PLL) for grid synchronization in grid-connected converters in weak grid that suffers from phase voltage-unbalance, variable phase and frequency conditions. Since the transformations and filtering of this method is computationally intensive and needs to be executed as fast as possible by the microcontroller unit (MCU) and Due to the presence of other current and voltage regulation loops in the same interrupt service routine (ISR) with high frequency rate, a hardware-based acceleration using the STM32G4x4 MCU built-in filter, filter math accelerator (FMAC) and coordinate rotation digital computer (CORDIC) is used to speed the execution time. This study addresses the description, derivation and implementation of the both DQ-PLL and DDSRF-PLL algorithms. The performance of both pure-software and accelerated implementation is demonstrated, compared and run on a three-level active neutral point clamped (ANPC) converter board. In proposed method, CPU load dropped from 80.5% by using the conventional software implementation to 23.6% (70% load reduction).This reduction in CPU load enables the addition of more features and more advanced current and voltage control algorithms.

Operation and Efficiency Analysis of a Five-Level Single-Phase Hybrid Si/SiC Active Neutral Point Clamped Converter

The ability to improve both the size and efficiency of multilevel single-phase converters is a key to uplift them as an attractive solution for industries, while the high number of switches and complex modulation techniques understandably make them unattractive. Five-level active neutral point clamped (ANPC) converter, due to its inherent advantages such as employing different switching frequencies and using different switch technologies, presents an ideal candidate for study. This article performs a comprehensive analysis of the converter to highlight the advantages of it. This analysis results in a modified hybrid modulation that effectively regulates the neutral point (NP) of the dc link. Consequently, the combination of the topology and the modified modulation make the converter ideal to utilize two different switch technologies—in this article, silicon carbide (SiC) and Si MOSFET. To evaluate the analysis and the effectiveness of modulation, a 2-kW hybrid five-level ANPC is built. The converter current behavior is analyzed to determine the power loss in the filter and switches. The efficiency measurement is performed and compared with the calculated efficiency. There is a close coherency between the measurement and the calculated results and a peak efficiency of 98.4% is achieved.

Enhanced Level-Shifted Modulation for a Three-Phase Five-Level Modified Modular Multilevel Converter (MMC)

The rapid growth of the penetration level of renewable energy sources (RESs) in low-voltage (LV) networks increases the research interest in more efficient, compact, reliable, and easily expandable energy conversion systems. The long commutation loops of the existing LV multilevel converters (MLCs), such as active neutral point clamped (ANPC) converters, lead to high-voltage overshoots induced during switching due to the significant parasitic inductance. Modular multilevel converters (MMCs) are gaining an increased interest due to their modularity, flexibility, and short commutation loops also for some LV applications. However, several issues related to the number of components, dc capacitor requirements, and the added complexity need to be considered. This article aims to reduce the five-level modified MMC capacitance requirements where the upper and lower submodules (SMs) are connected in parallel. This reduction has been achieved using an improved modulation technique by minimizing the insertion time of the SMs that require higher capacitance. The proposed modulation is effective in reducing the inner SMs’ capacitor voltage ripple at lower modulation indices. Instead, the circulating current injection of the second harmonics effectively reduces the voltage ripple at higher modulation indices. Thus, maximum reduction in the total capacitance requirement for the entire operating range of modulation index can be achieved by a proper combination of the two solutions. Simulation and experimental results on a laboratory-scaled prototype verify the validity of the proposed solution.

Model Predictive Control Scheme of a Four-Level Quasi-Nested Converter Fed AC-Drive, with dc-Link Voltage-Drift Compensation

In this paper, a Model Predictive Control (MPC) strategy is introduced for its application in a four-level quasi-nested topology, feeding an Interior Permanent Magnet Synchronous Machine (IPMSM) AC-drive. The proposed control strategy is capable to synthesize the required output space vectors to ensure perfect tracking of the AC-drive speed reference under different loading conditions, while also ensuring voltage balance between the dc-link capacitors. The proposed converter topology is based on a reduced number of components compared to other mature converter topologies, such as the neutral-point clamped converter (NPC) or the active neutral-point clamped converter (ANPC) topologies, when compared in terms of the number of output voltage levels, since this quasi-nested topology does not require passive clamping devices such as diodes or active switches. Moreover, no floating dc-link capacitors with asymmetrical voltage levels are employed, thus simplifying the dc-link capacitor voltage balance mechanism. This work presents the switching operation principles and MPC control law when supplying an IPMSM AC-drive load are addressed in detail. Simulation and validation results using a Hardware in the Loop (HIL) prototype under different operation conditions are presented in order to validate the proposed converter topology and control strategy.

Active Voltage Balancing Control of a Seven-Level Hybrid Multilevel Converter Topology

The series connection of a standard three-level active neutral-point-clamped (ANPC) inverter and two cascaded H-bridge (CHB) modules comprising the flying capacitors (FCs) instead of the isolated dc voltage sources forms a seven-level hybrid topology that is referred to as improved ANPC (I-ANPC) converter. This article proposes an active voltage balancing technique for control of this hybrid multilevel inverter. The suggested method is based on a set of effortless logic equations that aim to stabilize the FC voltages within the CHB modules at their requisite reference values as well as to control the output voltage of the overall hybrid converter based on the phase-shifted-carrier pulsewidth modulation strategy. The experimental results obtained from a single-phase I-ANPC inverter's prototype are presented to validate the proposed control technique and its simple logic equations.

Cascaded Predictive Flux Control for a 3-L Active NPC Fed IM Drives Without Weighting Factor

Conventional model predictive control (MPC) for three-level active neutral point clamped converter (ANPC) utilizes weighting factors to achieve the optimal control of multiple control objectives in a single cost function. However, the selection of these weighting factors has an impact on the performance of the controlled objectives significantly. Tuning of weighting factors is usually tedious and lacks theoretical background. Moreover, the predictive and evaluation process for multiple objectives optimization have to be carried out by enumerating all admissible switching states within one loop. To simplify the complexity of this process and eliminate the effect of weighting factors, this paper proposes a cascaded predictive control scheme for a 3L-ANPC inverter fed induction machine (IM) drive. With the proposed approach, three separate cost functions for three control objectives, stator flux vector, neutral point voltage and device loss distribution are evaluated in a cascaded way, so that the optimization of these control objectives is performed independently. A 3L-ANPC inverter driven IM drive is studied in this paper to verify the effectiveness of the proposed algorithm. Experimental results in different operating conditions confirm that the proposed method achieves satisfactory steady-state and transient performances comparable to the conventional predictive control approach. The weighting factors used in the conventional method are eliminated and the computational effort is reduced by 68% compared to the conventional method without any sacrifice in the drive performance.

Four-Level Hybrid Neutral Point Clamped Converters

In terms of low-voltage (<; 1.5 kV) and high-power (>10 kW) industry applications, power converters without any flying capacitors are preferred to ensure high efficiency, high power density, and light weight. As for these requirements, this article proposes a four-level hybrid neutral point clamped (4L-HNPC) converter and a four-level hybrid active neutral point clamped (4L-HANPC) converter. Compared with the existing three-level and four-level converters, the proposed 4L-HNPC and 4L-HANPC converters show higher efficiency or more even loss distribution. Compared with five-level converters, the proposed converters show higher power density and lower weight due to the absence of flying capacitors. To solve the dc-link capacitor imbalance issue, this article proposes a variable-reference voltage-balancing control method that aims at controlling the middle capacitor voltage at 1/3 of the dc-link voltage via a proportional-integral (PI) regulator. Meanwhile, the other two capacitor voltages are automatically balanced. Compared with the existing voltage-balancing control methods, the proposed variable-reference voltage-balancing control method is more suitable for digital implementation as only one triangular carrier is used. Both simulation and experimental studies have been carried out to verify the proposed four-level converter topologies and variable-reference voltage-balancing control method.

Comparison of Isolated Bidirectional DC/DC Converters Using WBG Devices for More Electric Aircraft

With the aim towards lighter and more efficient electrical systems in future aircraft, design of DC/DC converters with high efficiency, power density and improved thermal management becomes necessary. This paper investigates the detailed design of isolated bidirectional DC/DC converters for more electric aircraft (MEA). Use of wide bandgap (WBG) devices to enhance system efficiency is considered. A transformer optimization technique based on switching frequency for different converter topologies is investigated. The control strategy of the discussed configurations are verified in the PLECS simulation environment. Dual active bridge (DAB), input-series output-parallel (ISOP), neutral point clamped (NPC) and active neutral point clamped (ANPC) converters are considered to exploit benefits offered by WBG devices for MEA. A comparison is performed in terms of efficiency, thermal management, power density and electromagnetic interference (EMI). The results indicate that the ANPC converter is better for efficiency, thermal management and power density. The DAB converter showed similar results to the ISOP with the DAB yielding higher efficiency. The NPC and ANPC configurations resulted in the best EMI performance. The NPC converter proved to be the least effective solution with regard to efficiency, thermal management and power density.

An Active Hybrid Modulation Strategy for a Si/SiC Hybrid Multilevel Converter

This paper proposes a hybrid modulation strategy for a medium-voltage hybrid seven-level (7-L) converter, which consists of a three-phase silicon (Si) IGBT-based active-neutral-point-clamped (ANPC) stage and a cascaded silicon carbide (SiC) MOSFET-based H-bridge (HB) stage in each phase. Within the framework of the proposed modulation strategy, three floating HB converters are controlled using a high-frequency three-level (3-L) space-vector-modulation (SVM), while a low-frequency modulation is applied to the ANPC converter. To regulate the DC voltages across floating capacitors, a zero-sequence voltage (ZSV) injection method is adopted. The proposed method possesses three major advantages. First, it enables the simplification from a 7-L to a 3-L SVM, which significantly reduces the computational burden. Second, with all the high-frequency switching actions assigned to SiC devices in the HB stage, the power loss of the hybrid 7-L converter is reduced. Third, the hybrid modulation together with the ZSV injection enables a wider stable operating range compared to the existing 7-L SVM method. Finally, both simulation and experimental results performed on the scale-down and the full-scale 1 MVA prototype validate the effectiveness of the proposed hybrid modulation strategy.