Active-matrix Display Research Articles

Vertically stacked skin-like active-matrix display with ultrahigh aperture ratio

Vertically stacked all-organic active-matrix organic light-emitting diodes are promising candidates for high-quality skin-like displays due to their high aperture ratio, extreme mechanical flexibility, and low-temperature processing ability. However, these displays suffer from process interferences when interconnecting functional layers made of all-organic materials. To overcome this challenge, we present an innovative integration strategy called “discrete preparation-multilayer lamination” based on microelectronic processes. In this strategy, each functional layer was prepared separately on different substrates to avoid chemical and physical damage caused by process interferences. A single interconnect layer was introduced between each vertically stacked functional layer to ensure mechanical compatibility and interconnection. Compared to the previously reported layer-by-layer preparation method, the proposed method eliminates the need for tedious protection via barrier and pixel-defining layer processing steps. Additionally, based on active-matrix display, this strategy allows multiple pixels to collectively display a pattern of “1” with an aperture ratio of 83%. Moreover, the average mobility of full-photolithographic organic thin-film transistors was 1.04 cm2 V−1 s−1, ensuring stable and uniform displays. This strategy forms the basis for the construction of vertically stacked active-matrix displays, which should facilitate the commercial development of skin-like displays in wearable electronics.

Strain-Sensor-In-Pixel Technology for Resolution-Sustainable Stretchable Displays.

One of the limitations of stretchable displays is the severe degradation of resolution or the decrease in the number of pixels per unit area when stretched. Hence, we suggest a strain-sensor-in-pixel (S-SIP) system through the adoption of hidden pixels that are activated only during the stretch mode for maintaining the density of on-state pixels. For the S-SIP system, the gate and source electrodes of InGaZnO thin-film transistors (TFTs) in an existing pixel are connected to a resistive strain sensor through the facile and selective deposition of silver nanowires (AgNWs) via electrohydrodynamic-jet-printing. With this approach, the strain sensor integrated TFT functions as a strain-triggered switch, which responds only to stretching along the designated axes by finely tuning the orientation and cycles of AgNW printing. The strain sensor-integrated TFT remains in an off-state when unstretched and switches to an on-state when stretched, exhibiting a large negative gauge factor of -1.1 × 1010 and a superior mechanical stability enduring 6000 cycles, which enables the efficient structure to operate hidden pixels without requiring additional signal processing. Furthermore, the stable operation of the S-SIP in a 5 × 5-pixel array is demonstrated via circuit simulation, implying the outstanding applicability and process compatibility to the conventional active-matrix display backplanes.

Nanosurface-reconstructed perovskite for highly efficient and stable active-matrix light-emitting diode display.

Perovskite quantum dots (QDs) are promising for various photonic applications due to their high colour purity, tunable optoelectronic properties and excellent solution processability. Surface features impact their optoelectronic properties, and surface defects remain a major obstacle to progress. Here we develop a strategy utilizing diisooctylphosphinic acid-mediated synthesis combined with hydriodic acid-etching-driven nanosurface reconstruction to stabilize CsPbI3 QDs. Diisooctylphosphinic acid strongly adsorbs to the QDs and increases the formation energy of halide vacancies, enabling nanosurface reconstruction. The QD film with nanosurface reconstruction shows enhanced phase stability, improved photoluminescence endurance under thermal stress and electric field conditions, and a higher activation energy for ion migration. Consequently, we demonstrate perovskite light-emitting diodes (LEDs) that feature an electroluminescence peak at 644 nm. These LEDs achieve an external quantum efficiency of 28.5% and an operational half-lifetime surpassing 30 h at an initial luminance of 100 cd m-2, marking a tenfold improvement over previously published studies. The integration of these high-performance LEDs with specifically designed thin-film transistor circuits enables the demonstration of solution-processed active-matrix perovskite displays that show a peak external quantum efficiency of 23.6% at a display brightness of 300 cd m-2. This work showcases nanosurface reconstruction as a pivotal pathway towards high-performance QD-based optoelectronic devices.

All-Thermally Evaporated Blue Perovskite Light-Emitting Diodes for Active Matrix Displays.

With the rapid progress of perovskite light-emitting diodes (PeLEDs), the large-scale fabrication of active matrix PeLED displays (AM-PeLEDs) is gaining increasing attention. However, the integration of high-resolution PeLED arrays with thin-film transistor backplanes remains a significant challenge for conventional spin-coating techniques. Here, the demonstration of large-area, blue-emitting AM-PeLEDs are demonstrated using a vacuum deposition technique, which is regarded as the most effective route for organic light-emitting diode displays. By the introduction of an in situ passivation strategy, the defects-related nonradiative recombination is largely suppressed, which leads to an improved photoluminescence quantum yield of vapor-deposited blue-emitting perovskites. The as-prepared blue PeLEDs exhibit a peak external quantum efficiency of 2.47% with pure-blue emission at 475nm, which represents state-of-the-art performance for vapor-deposited pure-blue PeLEDs. Benefiting from the excellent uniformity and compatibility of thermal evaporation, the 6.67-inch blue-emitting AM-PeLED display with a high resolution of 394 pixels per inch is successfully demonstrated. The demonstration of blue-emitting AM-PeLED display represents a crucial step toward full-color perovskite display technology.

Al Reaction-Induced Conductive a-InGaZnO as Pixel Electrode for Active-Matrix Quantum-Dot LED Displays

Thin-film transistors (TFTs) based on amorphous Indium-Gallium-Zinc Oxide (a-IGZO) can be used to drive the quantum-dot light-emitting diodes (QLEDs) for active-matrix (AM) displays. To reduce the fabrication complexity, Al reaction-induced conductive a-IGZO is developed as a common electrode, which simultaneously serves as a drain electrode for the TFT and as a bottom electrode for the QLED. The obtained a-IGZO electrode exhibits a low sheet resistance of 120 <inline-formula> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula>/ and a high transmittance of 92.1&#x0025; at a thickness of 100 nm. With the proposed a-IGZO electrode, QLED demonstrates a high external quantum efficiency of 26&#x0025;. Moreover, because both TFT and QLED share the same a-IGZO electrode, at least two patterning processes can be reduced in making a AM display. Our results suggest that Al reaction-induced conductive a-IGZO could be a promising pixel electrode for AMQLED displays.

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

Neuromorphic display system for intelligent display

Ultra-high integration, ultra-high resolution, intelligence and human-machine interaction is the inevitable trend of flat panel displays. However, most intelligent display systems are based on traditional Von Neumann architecture, which need to call data frequently because the storage and computation are separated, resulting in serious loss of power consumption and speed. In this paper, the concept of "neuromorphic display" device is proposed for the first time. The display technology is organically combined with the artificial neural network system to build a neuromorphic display network including the sensor module, processing module and display module, which endows the tiny artificial neural network system with the ability of perception, dispose and execution. The neuromorphic display enable to avoid serious loss of power consumption and speed without calling data frequently, and the color of the emitted light directly represents the result of neuromorphic display’s perception and processing of various external environment haptic stimuli. Furthermore, the neuromorphic element is applied in display that one-transistor one-synaptic transistor (1T1S) pixel circuit is demonstrated to replace two-transistor one-capacitance (2T1C) pixel circuit in traditional display to simplify pixel circuit. Therefore, the neuromorphic display showed great potentials in interactive input/control devices, intelligent wallpaper, robots and medical/health monitoring devices, and the 1T1S pixel circuit can simplify circuit design for active matrix display.

Dynamic Simulation of a-IGZO TFT Circuits Using the Analytical Full Capacitance Model (AFCM)

The Analytical Full Capacitance Model (AFCM) for amorphous oxide semiconductors thin film transistors (AOSTFTs) is first validated, using a 19-stages Ring Oscillator (RO) fabricated and measured. The model was described in Verilog-A language to use it in a circuit simulator in this case SmartSpice from Silvaco. The model includes the extrinsic effects related to specific overlap capacitances present in bottom-gate AOSTFT structures. The dynamic behavior of the simulated circuit, when the TFT internal capacitances are increased or decreased and for different supply voltages of 10, 15 and 20 V, is compared with measured characteristics, obtaining a very good agreement. Afterwards, the AFCM is used to simulate the dynamic behavior of a pixel control circuit for a light emitting diode active matrix display (AMOLED), using an AOSTFT.

Thermal Budget Reduction in Metal Oxide Thin-Film Transistors via Planarization Process

This work reports a method to reduce the process thermal budget in metal oxide (MO) thin-film transistors (TFTs). Using the thermal curing of a fluorinated polyimide planarization (PLN) layer as an efficient device activation process, this method eliminates the need for additional annealing steps before the existing PLN process in the fabrication. Bottom-gated TFTs with indium tin oxide (ITO)stabilized ZnO channels were fabricated by this method and exhibited improved electrical characteristics over control devices made with a higher thermal budget. A steep subthreshold swing of 82.8 mV/decade and a high on-off ratio of 1.3 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> were achieved. This improvement can be attributed to the fluorine diffusion from the PLN layer to the MO channels during the curing step. This method is useful for the cost-effective production of active-matrix flatpanel display (AM-FPD) panels and the implementation of MO TFTs on flexible substrates.

A Low-Area and Fully Nonlinear 10-Bit Column Driver With Low-Voltage DAC and Switched-Capacitor Amplifier for Active-Matrix Displays

To reduce the circuit area and support a 10-bit fully nonlinear gamma correction, a new column driver architecture constructed with a 10-bit one-stage low-voltage resistor string digital-to-analog converter (RDAC) (LVDAC) and a switched-capacitor amplifier (SC-AMP) is proposed. Because the LVDAC is implemented with low-voltage (LV) MOSFETs instead of high-voltage (HV) MOSFETs, the circuit area is drastically reduced. In addition, there is no need to use level shifters that must be used in the traditional column driver between the LV logic circuit and the HV DAC, thus further decreasing the circuit area. By utilizing a one-stage DAC architecture, the effective bit resolution of nonlinear gamma correction can be increased compared with previous two-stage DACs, in which the output voltages of the coarse DAC are interpolated. The output voltage of LVDAC is amplified by SC-AMP to reach the requisite HV to drive the display panel. In designing the SC-AMP, the effects of non-idealities, such as random offset voltage, capacitance mismatch, parasitic capacitance, and switching error are quantitatively analyzed, and circuit techniques to suppress the effects are presented. The proposed column driver was fabricated using a 90-nm CMOS process. The circuit area of the proposed 10-bit column driver is only 69.0% of that of the conventional 8-bit column driver because the conventional 8-bit HV RDAC (HVDAC) using 5-V MOSFETs is replaced by the proposed 10-bit LVDAC using 1.2-V MOSFETs, along with the SC-AMP with a gain of four to support the 5-V output voltage range. The measurement results show that the differential nonlinearity (DNL) and integral nonlinearity (INL) are +0.2/-0.18 and +0.42/-0.06 LSB, respectively, with an LSB voltage of 4.5 mV. The measured maximum deviation of voltage outputs (DVOs) between 50 channels is 7.9 mV.

A Timing Model for the Optimal Design of a Prototype Active-Matrix Display

Describing the dependence of both signal propagation delay and pixel charging time on display specifications and device parameters, a timing model and a combined coordinate system for its convenient visualization are developed for an active-matrix display. Presented also is an algorithm developed to optimally determine the width of the interconnects and that of the address transistor for maximizing the aperture ratio of a pixel. The model could be applied to search for optimal viable designs under different panel specifications and technology constraints.

Megahertz operation of vertical organic transistors for ultra-high resolution active-matrix display

Organic field-effect transistors (OFETs) are the technology of choice for flexible electronic devices such as active-matrix (AM) displays. However, despite the continuous improvement of charge carrier mobility in organic semiconductors, the performance of conventional OFETs is too poor for demanding electronic applications. Furthermore, hero-devices reported in literature often make use of processes (shadow mask fabrication, large channel width devices) which cannot be adapted in production lines, e.g. for AM displays. Here we present an OFET with a novel vertical device structure. It has static and dynamic transistor performance superior over conventional lateral organic transistors with regard to application in AM displays. We show that these vertical transistors can be integrated using processes well-established in the micro-electronic industry and thus offer seamless transfer into production lines. We discuss that these transistors obey scaling laws for footprint and capacitance which make them superior over other planar transistor devices. In combination with excellent device stability and uniformity, vertical OFET might enable ultra-high resolution flexible displays of the future.

A monolithically integrated micro-LED display based on GaN-on-silicon substrate

A monolithic micro-LED display technology is proposed using a gallium-nitride-on-silicon substrate. An active matrix (AM) display was realized by interconnecting nitride-based LEDs as display pixels with Si thin-film transistors (TFTs) as driving circuitries. MOS TFTs were fabricated on a Si surface which had been exposed after dry etching of the LED epitaxial layer. The mobility and sub-threshold slope were measured as 354.3 cm2 V−1 s−1 and 0.64 V dec−1, respectively. A 150 pixel-per-inch 0.6 inch monolithic display was demonstrated with a 60 × 60 pixel array AM display by an integration technology on the same substrate.

Inkjet-Printed Oxide Thin-Film Transistors Based on Nanopore-Free Aqueous-Processed Dielectric for Active-Matrix Quantum-Dot Light-Emitting Diode Displays.

Inkjet-printed thin-film transistors (TFTs) for active-matrix light-emitting diode display are drawing much attention for the advantages of low material waste and simple fabrication processes without vacuum deposition and photolithography steps. Herein, for the first time, solution-processed quantum-dot light-emitting diode (QLED) array displays driven with the inkjet-printed oxide TFT backplane were realized and demonstrated using a general "solvent printing" method. To suppress nanopore formation in the thick oxide films, carbon-free aqueous inks were employed for gate dielectrics. No nanopore was found in the whole 120 nm-thick gate dielectrics. However, compared to the organic inks, the aqueous inks have very low viscosity, resulting in uncontrollable ink spreading especially in transline printing. The ink easily shrinks on the low-surface-energy area and spreads on the high-surface-energy area, leading to serious uniformity problems (the upper lines even break at the top of underlying lines). To solve the problem, a "solvent printing" method was employed to form coffee-line surface-energy patterns, which were uniform without shape distortion. The surface-energy patterns can restrain the ink spreading and tune the morphology of the printed films. As a result, multilayer TFT arrays with ideal shapes were achieved. The mobilities of the printed top-gate TFTs in the backplane array were 3.13 ± 0.87 cm2 V-1 s-1 for switching TFTs and 2.22 ± 0.38 cm2 V-1 s-1 for driving TFTs. Finally, an active-matrix red QLED character display based on the printed oxide TFT backplane and solution-processed QLEDs was demonstrated. The "solvent printing" method opens a general route for inkjet-printed multilayer electronic devices.

Seeking Nominations for 2020 SID Honors and Awards

Seeking Nominations for 2020 SID Honors and Awards

4‐3: Distinguished Paper: 10 µm Pixel, Quantum‐dots Color Conversion Layer for High Resolution and Full Color Active Matrix Micro‐LED Display

A fine patternable quantum‐dots (QDs) color conversion layer (CCL) for high resolution and full color active matrix (AM) micro‐LED display is demonstrated. QDs CCL could be patterned until 10 µm using photolithography process. It is found that multi‐coatings with R‐ and G‐QD CCLs on LED array can provide full color AM display.

Ten micrometer pixel, quantum dots color conversion layer for high resolution and full color active matrix micro‐LED display

AbstractA fine patternable quantum dots (QDs) color conversion layer (CCL) for high resolution and full color active matrix (AM) micro‐LED (μ‐LED) display is demonstrated. QDs CCL could be patterned until 10 μm using photolithography process. It is found that multicoatings with red and green QDs (R‐ and G‐QDs) CCLs on LED array can provide full color AM display.

Mobility impact on compensation performance of AMOLED pixel circuit using IGZO TFTs

The suitability of indium gallium zinc oxide (IGZO) thin-film transistors (TFT) for implementation of active matrix display of organic light emitting diodes (AMOLED) compensation pixel circuits is addressed in this paper. In particular, the impact of mobility on compensating performance for the implementation in AMOLED pixel circuits is investigated. Details of the effective mobility modeling using the power law of gate-to-source voltage are provided, and parameters are extracted according to the measured current-to-voltage data of IGZO TFT samples. The investigated AMOLED pixel circuit consists of 4 switching TFTs, 1 driving TFT, and 1 capacitor. A " source-follower” structure is used for the threshold voltage extraction of the driving transistor. A new timing diagram is proposed; thus the current error of the pixel circuit is almost independent of the effective mobility. But, to improve the precision of the threshold voltage extraction of the driving transistor, the mobility is required to be greater than 5 cm2V−1s−1. On the other hand, the optimized storage capacitance is reversely proportional to the effective mobility. Thus, the layout area of the pixel circuit can be decreased from 100 × 100 to 100 × 68 μm2, with the effective mobility increased from 10 to 50 cm2V−1s−1. Therefore, IGZO TFT is a good alternative backplane technology for AMOLED displays, and a higher effective mobility is preferred for high compensation performance and compact layout.

Automatic Fault Detection Circuit for Integrated Gate Drivers of Active-Matrix Displays

This paper presents automatic fault detection circuit for integrated gate drivers. The proposed circuit consists of one capacitor and two TFTs per scan line. The circuit can detect three types of faults, such as line disconnection (LD), low voltage stuck (LVS), and high voltage stuck (HVS) for the gate driver due to external physical stress. Simulation results showed the proposed circuit operates well. In order to verify the circuit operation, it was fabricated with indium gallium zinc oxide thin film transistors process. The measurement results also verified that our proposed fault detection circuit could detect the types and locations of the LD and LVS of the gate driver successfully. However, we found that HVS can be detected, but further study is needed to accurately detect the position of HVS in the proposed circuit.

A Bottom-Gate Metal–Oxide Thin-Film Transistor With Self-Aligned Source/Drain Regions

Proper driving of a large-area, high-resolution, and high-frame-rate active-matrix display can be hindered by excessive delay along a signal path, such as a scan line. Depending on the transistor architecture, such delay could be dominated by the parasitic overlap capacitance between the gate electrodes and the source/drain (S/D) regions of the address-transistors attached to a scan line. While the capacitance can be minimized by employing a transistor with the edges of the regions self-aligned (SA) to those of the electrode, actual implementation is easier with a top-gate rather than the more commonly deployed bottom-gate architecture. Presently reported is the realization and characterization of a bottom-gate, SA indium–gallium–zinc oxide transistor. The extent of the overlap between the S/D and the gate is determined by a thermal “activation” process, similar to how it is controlled in a conventional top-gate, SA transistor.