Novel silicon microstrip detectors, which combine double side operation, on-chip coupling capacitors and two levels of metallization have been developed, manufactured and tested. This approach aims at very low mass system assemblies, particularly important for applications in vertex detection at LEP and at future B-factories. Devices were integrated on 100 mm diameter silicon wafers on which several dielectrics for AC coupling were tested. A SiO2Si3N4 double dielectric layer, etched between strips, performed best with respect to leakage current, breakdown voltage and oxide integrity. In order to minimize stray capacitance between strips in the 2 metal layers, an extremely thick (5.2 μm) intermetal dielectric layer was used. A special photolithographic and etching process which guarantees good step coverage was developed, resulting in tapered vias.Static measurements were carried out on detectors of various dimensions. Leakage current, depletion voltage and capacitive effects from cross-coupling between metal 1 and metal 2 were measured. In particular, the breakdown characteristics of the coupling capacitor formed by the implanted strips and the metal 1 strips were investigated for several insulators. With the SiO2Si3N4 double dielectric layer, a pinhole density of the order of 1% was obtained for some of the detectors, with leakage currents of around 100 nA/cm2. The connectivity between metal 1 and metal 2 layers was found to be excellent. The dynamic response of the detectors was studied using the VIKING front-end readout chip.The results show that these complex double-sided chips, which are required for next generation detectors, are reaching a state of maturity.