6-bit Phase Shifter Research Articles

A 28‐GHz reconfigurable 1‐bit substrate‐integrated‐waveguide based phase shifter

A switched-line substrate integrated waveguide 1-bit phase shifter is designed and measured at 28 GHz. Reconfigurability is achieved through a set of floating metallized vias whose connection to the waveguide top and bottom layers can be controlled using PIN diodes. The reconfigurable vias are used to dynamically create alternative paths having different phase delays. A three-metal layer printed circuit board stack-up is employed to fully integrate the diode biasing network and to ease the routing of the bias signal. The high integration of the proposed configuration makes it well suited for the implementation of reconfigurable Butler matrices. The phase shift offset between the two states of this digital 1-bit phase shifter equals 262° at 28 GHz, leading to a measured figure of merit of 161°/dB, and input 1-dB compression point over 20 dBm. The total area is 13.72 × 10.9 mm without feeding lines and bias.

Improved Rotating-Element Electric-Field Vector Method for Fast Far-Field Phased Array Calibration

We present a fast far-field phased array calibration/beamforming method. An improved version of the rotating-element electric-field vector (REV) method, which is used to calibrate array antennas by measuring the power received at a far-field point while varying the phase of each element, is proposed. Two major improvements were made. First, a simpler algorithm was used to determine the calibration value of the conventional REV method, without disconnecting an antenna element during the calibration process. Second, a solution for a specific case was added for a more accurate categorization to use the correct formula. This improved rotating-element electric-field vector (IREV) is experimentally verified. Curve fitting and sinusoidal regression were used to reduce the number of measurements required for fast calibration/beamforming. Arrays of a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1\times 6$ </tex-math></inline-formula> phased array system comprising a 4-bit phase shifter and a 6-bit variable-gain attenuator (VGA) were calibrated using only measurements of the far-field received power. Calibrations were performed when the horn and array antennas were perfectly aligned with each other and when the latter was tilted at an angle of 12° relative to the former.

A Wideband Compact 5-Bit Phase Shifter With Low Loss and RMS Errors for 5G Applications

This letter presents a differential 5-bit switch-type phase shifter (PS) that is based on a 65-nm CMOS process. This PS uses a new differential PS unit, which includes a high-pass state and a low-pass state. The strengths of this PS unit include low-phase error and low-amplitude error between two states, which can effectively improve the performance of the entire 5-bit PS. The fabricated 5-bit PS has a low average insertion loss of <8.0 dB, low root mean square (rms) phase error of <5.9°, and low rms amplitude error of <0.22 dB in 35–41.9 GHz. It also has a compact size of 0.125 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Phase and Amplitude Control Integrated Circuit in 0.18 μm SiGe BiCMOS for Sub-6 GHz Phased Array Applications

This paper presents simulation results of the C-band transmit/receive (Tx/Rx) phased-arrays integrated circuit (IC) for sub-6 GHz communication links. It is based on 0.18 μm SiGe BiCMOS technology. Phase and amplitude control IC consists of one Tx/Rx channel. Digitally controlled phase shifter allows adjusting relative phase of the output microwave signal in the range from 0 to 360 degrees with 5.625 degree step (6-bit resolution). Digitally controlled active attenuator provides the transfer ratio adjusting in the range from 0 to –31 dB with 1 dB step (5 bit resolution). Amplitude and phase correction system based on integrated temperature sensor, auxiliary 4-bit phase shifter, 4-bit attenuator and digital control unit is implemented. Correction in –60—85 °C temperature range with 5-bit resolu-tion is provided. The root mean square (rms) phase adjustment error does not exceed 1.6 degree. The rms attenuation error does not exceed 0.37 dB. The noise figure in Rx mode is below 6.5 dB. The output power in Tx mode is above 6 dBm at P1dB. The power consumption is 375 mW and 525 mW in Rx and Tx modes respectively.

A 32–40 GHz 4-Channel transceiver with 6-bit amplitude and phase control

This paper presents a Ka band 4-Channel transceiver with 6-bit amplitude and phase control using a 0.13-μm SiGe BiCMOS process. The transmit/receive (TX/RX) channel consists of single-pole double-throw (SPDT) switch, 6-bit passive phase shifter (PS), 6-bit passive attenuator (ATT), low noise amplifier (LNA), power amplifier (PA), and driver amplifier (AMP). Through the virtual negative voltage bias and transmission-line based phase shifter, an RMS phase error less than 3° is achieved with 5.6° steps at 32–40 GHz. The amplitude control operates with 0.5 dB steps while maintaining an RMS gain error of 0.4 dB. The transceiver also integrates serial peripheral interface (SPI), power manager and temperature sensor. The transmitter consumes 28 mA from a 3.3 V supply, and the receiver consumes 16 mA from a 3.3 V supply, 35 mA from a 5 V supply. The chip occupies an area of 5.8 × 2.7 mm2.

A Beam Steering System Design based on Phased Array Antennas

This paper presents a low-cost, compact, beam-steering phased array antenna (PAA) system based on a novel approach to integrating low-cost, high-performance phased shifters with their controlling boards within an antenna structure. Consequently, the system has been reduced to one structure for the antenna array and integrated phase shifters, rather than the sophisticated PAA with two separate boards which are connected by RF coaxial cables. The system has been achieved by the following stages; Firstly, the steering vector weights matrix was calculated by MATLAB. Then, four elements of uniform linear Microstrip patch antenna array with their feeding network power divider were designed and simulated in the CST simulation program. As a result, a practical model has been implemented. The designed RF-PCB for the 4-bit phase shifters MAPS_010143 were integrated within the antenna panel. The system works at a resonance frequency of (2.4 GHz), with (±45°) steering capability. The results are presented for the three models. The practical results match the simulation results very closely, fence proving the accuracy of the model and demonstrating a highly effective design.

Compact and Low-Loss Phase Shifters and Multibit Phase Shifters Based on Inverted-E Topology

This article proposes a novel inverted-E topology for the design of phase shifters and multibit phase shifters. The novel phase shifter consists of a 50 Ω main transmission line (MTL) symmetrically loaded with equally spaced three open-/short-circuited stubs via P-I-N switching diodes. The stubs provide the needed susceptances to achieve a phase shift with large value range. Thanks to the design flexibility of the topology, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</sup> -1 sets of stubs can share the same MTL, providing 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> phase states of an N-bit phase shifter. Design theory and performance analysis of the design variables are presented, followed by the analysis and simulation of four 22.5°, 45°, 90°, and 180° phase shifters. For validation and comparison, two typical 45° and 90° phase shifters and a 3-bit phase shifter, providing eight distinct phase states, have been fabricated and measured. The measured results show good agreement with analysis and simulation. In comparison to its traditional counterparts, the novel design yields a highly compact phase shifter because the separation between the loading elements on the MTL can be less than quarter wavelength, whereas low insertion loss is achieved because the diodes are loaded to the branches. In addition, multibit phase shifter in single unit can be realized with much shorter length and lower insertion loss.

Spoof Surface Plasmon Polariton Delay Lines for Terahertz Phase Shifters

The terahertz gap attracted interest of researchers with its captivating properties such as its potential for ultrawideband communication and high-resolution imaging applications, which require robust and efficient terahertz components and circuits. Terahertz spoof surface plasmon polaritons are perfect alternatives to implement terahertz integrated circuits. We present the first-time demonstration of the terahertz spoof surface plasmon polariton delay lines for terahertz phase shifters, which present an unprecedented insertion phase versus loss performance. The electrical lengths of the proposed delay lines are tuned just by changing the corrugation depths, which allows the designer to keep the physical length of the delay lines constant. In order to verify the proposed idea, four different delay lines having the same length of 1052.5 μm are designed, where the electrical lengths of the delay lines are selected to represent the four different phase states of a 2-bit phase shifter. The measurement results of the fabricated terahertz delay lines show almost perfect phase accuracy and very good agreement with the simulations, having an ultra-low average phase error of 0.6%, and average insertion and return losses of −2.3 and −18 dB, respectively. These measurements result in, to the best of our knowledge, a record-high figure-of-merit of 90°/dB compared to all other kinds of planar waveguides at 0.3 THz. The proposed delay lines emerge as a very high-performance and promising candidate for all the waveguide-based components that are crucial for the terahertz integrated circuits.

A 30–36 GHz Passive Hybrid Phase Shifter With a Transformer-Based High-Resolution Reflect-Type Phase Shifting Technique

This brief presents a passive hybrid phase shifter consisted of a 5-bit switch-type phase shifter (STPS) and a 4-bit high resolution reflection-type phase shifter (RTPS). The STPS as the main body of the circuit utilizes the bridged T-type and high-pass/low-pass phase shifting cells. A novel high-resolution RTPS is proposed as a supplement of the STPS to improve the phase resolution and minimize the phase error. In the RTPS, a novel reflective load, which contains a transformer and a 4-bit digital-controlled switched capacitor array, is adopted. The transformer in the RTPS can weaken the variation of the reflection coefficient resulted by a large-capacitance switched capacitor array, which makes the control of the phase shifting more convenient and accurate at millimeter-wave (mm-wave) frequency. A proof-of-concept prototype was implemented in 55 nm CMOS technology. Measured results show that the root-mean-square (RMS) phase error of the proposed phase shifter in a step of 2.8° is 0.69 – 2.19° at 30 – 36 GHz, and less than 1.1° from 30 to 34 GHz. An average insertion loss (IL) of 12.6 – 14.6 dB is achieved. The core circuit occupies 0.24 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> without DC power consumption.

A Low Cost, Low in-Band RCS Microstrip Phased-Array Antenna With Integrated 2-bit Phase Shifter

In this article, we present a low-cost microstrip phased-array antenna, which is composed of electronically reconfigurable elements. The p-i-n diodes' integrated elements have various functions, such as tunable polarization characteristics and adjustable radiation phases. The high sidelobe level (SLL) due to the 2-bit phase shifter can be reduced by a randomly rotated (RR) array element. It is shown that the array can realize electronic beam-steering capabilities and keep -10 to -14 dB sidelobes without tapering. To verify the above theory, an eight-element linear array prototype working at 3 GHz was designed, fabricated, and tested. Numerical simulations and experimental results show that, by controlling the “ON” and “OFF” states of p-i-n diodes, the radiation beam can be controlled to steer in a circular polarization (CP) mode, wherein the scanning angle is up to ±45°. Furthermore, the principle of suppressing the vector scattering field by the opposite phasing cancellation method can achieve in-band radar cross section (RCS) reduction. Simulation results show that approximately 15 dB in-band RCS reduction can be realized for both bistatic and monostatic RCS reduction with an 8×8 array.

Energy-Efficient MU-Massive-MIMO Hybrid Precoder Design: Low-Resolution Phase Shifters and Digital-to-Analog Converters for 2D Antenna Array Structures

This paper investigates a multi-user massive multiple-input multiple-output (MU-mMIMO) hybrid precoding (HP) scheme using low-resolution phase shifters (PSs) and digital-to-analog converters (DACs). The proposed HP approach involves two stages: RF beamforming based on the slowly time-varying channel second-order correlation matrix, and baseband MU precoding based on the instantaneous effective baseband channel to mitigate MU-interference by a regularized zero-forcing (RZF) technique. We consider three HP design architectures: (i) HP using full-resolution PSs and DACs, with a baseband transfer block for constant-modulus RF beamformer, (ii) HP using $b$ -bit PSs and full-resolution DACs, with an orthogonal matching pursuit (OMP) based algorithm that can approach the optimal unconstrained RF beamformer, and (iii) HP using $b$ -bit PSs and $q$ -bit DACs, taking into account also DAC quantization noise. Illustrative results show that the proposed HP schemes with low-resolution PSs can approach the sum-rate of full-resolution PSs by using only 2-bit PSs, while offering higher energy efficiency. Furthermore, a study of sum-rate results for various PS and DAC quantization levels reveals that HP can achieve near-optimal performance with only 2-bit PSs and 5-bit DACs. Moreover, a comparison of the different array configurations, namely, uniform linear array (ULA), uniform circular array (UCA), uniform rectangular array (URA), and concentric circular array (CCA), indicates that URA and CCA outperform UCA and ULA in terms of spectral and energy efficiencies.

5.8 GHz 4-Channel Beamforming Tx IC for Microwave Power Transfer

The microwave power transfer (MPT) system requires a massive Tx array for building a focused radio wave to efficiently transfer power to the Rx. Beamforming IC is one of the core elements for the massive Tx array. This paper presents a 5.8 GHz 4-channel beamforming Tx IC based on a CMOS process. The beamforming Tx IC includes a resistive 4-way power splitter, 5-bit differential phase shifters, drive amplifiers, and power amplifiers. Each channel is designed to transmit a power of no less than 100 mW. To verify the Tx IC, a 16-channel beamforming Tx module based on 16 patch antennas and four 4-channel Tx ICs was designed. The module also includes a PLL, a frequency doubler, and a 4-way Wilkinson power divider. MPT experiments to verify the beamforming IC and module were carried out using the implemented 16-channel Tx module at 5.8 GHz. Received power levels of 13 dBm and 2.1 dBm were achieved at distances of 0.4 and 1.4 m, respectively. The results are almost similar to the values acquired from the calculation using the Friis equation.

A Ka-Band Balanced Four-Beam Phased-Array Receiver With Symmetrical Beam-Distribution Network in 65-nm CMOS

This paper demonstrates a Ka-band CMOS phased-array receiver capable of generating four balanced beams from two inputs. A passive four-beam symmetrical differential network is proposed to distribute two input signals to eight channels and facilitate beam generation at the outputs in the receiver. The detailed design and optimization of the passive four-beam differential network are presented. Using a 6-bit passive vector-modulated phase shifter and a 5-bit switched-type attenuator in each channel, we implement a phase control of 360° with<; 4° RMS phase error and a gain control of 17 dB with <; 0.35 dB RMS gain error from 27 to 31 GHz. The receiver consumes a current of only 40 mA under 1 V supply voltage. Eight channels of the four-beam phased-array receiver were measured and a gain mismatch of less than 0.3 dB has been achieved. Beam to beam couplings are investigated by measurements and beam-to-beam isolation are better than 32 dB from 27 to 31 GHz. The chip size is 2.6×4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> including all digital control circuitry and pads.

Analysis and design of symmetric lattice based wideband 2-bit digital phase shifter

Analysis and design of symmetric lattice based wideband 2-bit digital phase shifter

Hybrid Parasitic Linear Array Antenna for Fine Beamsteering Applications

This paper presents an antenna that utilizes two beam steering techniques in concert in order to improve the antenna gain and steering resolution. Phased array steering is employed to achieve coarse resolution beam steering while parasitic steering is employed to achieve fine resolution beam steering within each coarse angle step provided by the phased array. A proof-of-concept antenna operating at 11.5 GHz was designed, fabricated and measured. The antenna incorporated 3-bit phase shifters and achieved a steering resolution of 1° over a steering range of ±40°. In order to achieve the same steering resolution, using a conventional array, it would be necessary to use 6-bit phase shifters. When compared to a conventional array the realised gain of the novel antenna was 4 dB higher. The antenna shows an improvement in scan loss when steering off boresight. The key advantage of the proposed Hybrid Parasitic Array Antenna is its low profile and high steering speed when compared with the alternative steering techniques.

Exploiting Intelligent Reflecting Surfaces in NOMA Networks: Joint Beamforming Optimization

This paper investigates a downlink multiple-input single-output intelligent reflecting surface (IRS) aided non-orthogonal multiple access (NOMA) system, where a base station (BS) serves multiple users with the aid of IRSs. Our goal is to maximize the sum rate of all users by jointly optimizing the active beamforming at the BS and the passive beamforming at the IRS, subject to successive interference cancellation decoding rate conditions and IRS reflecting elements constraints. In term of the characteristics of reflection amplitudes and phase shifts, we consider ideal and non-ideal IRS assumptions. To tackle the formulated non-convex problems, we propose efficient algorithms by invoking alternating optimization, which design the active beamforming and passive beamforming alternately. For the ideal IRS scenario, the two subproblems are solved by invoking the successive convex approximation technique. For the non-ideal IRS scenario, constant modulus IRS elements are further divided into continuous phase shifts and discrete phase shifts. To tackle the passive beamforming problem with continuous phase shifts, a novel algorithm is developed by utilizing the sequential rank-one constraint relaxation approach, which is guaranteed to find a locally optimal rank-one solution. Then, a quantization-based scheme is proposed for discrete phase shifts. Finally, numerical results illustrate that: i) the system sum rate can be significantly improved by deploying the IRS with the proposed algorithms; ii) 3-bit phase shifters are capable of achieving almost the same performance as the ideal IRS; iii) the proposed IRS-aided NOMA systems achieve higher system sum rate than the IRS-aided orthogonal multiple access system.

A 27–31 ​GHz 6-bit phase shifter with low phase error/gain variation in 65 ​nm CMOS

This paper presents a Ka-band 6-bit phase shifter with low phase error, low gain variation and 27–31 ​GHz bandwidth implemented in 65 ​nm CMOS. The phase shifter consists of a reflective-type phase shifter (RTPS) and a 0°/180° switcher. Benefiting from the addition of the switcher and the optimization of RTPS circuits, higher Q of the reflective load is obtained to improve the phase shifting performance. Measured results of the proposed phase shifter show 5.625° (6-bit) phase resolution, 1.64° in-band RMS phase error, 7.6 ​dB gain and 0.59 ​dB in-band RMS gain variation across the 4 ​GHz bandwidth, which are outstanding compared with the state-of-the-art works. The chip has 0.56 ​mm2 area and 24 ​mW power consumption.

A 3–6-GHz Wideband Compact 6-Bit Phase Shifter in 0.5-μm GaAs Technology

This letter presents a 3-6-GHz wideband compact 6-bit phase shifter (PS) in 0.5-μm GaAs pHEMT process. It combines a 3-bit enhanced high-pass/low-pass topology, a 2-bit modified low-pass/resonator topology, and a 1-bit switched-filter structure, with optimized cascade order to achieve a bandwidth (BW) up to 66.7%. Since the proposed PS consists of lumped elements and minimized the number of switches and inductors, it achieves a compact core size of 1.214 mm2. The 64-output state PS exhibits high phase resolution of 5.625° with an rms phase error (PE) of less than 4°, and an insertion loss (IL) less than 6.7 dB at 3-6 GHz. To the best of our knowledge, this PS achieves the largest BW with the smallest chip size among the published 5-bit/6-bit GaAs/GaN PSs over a similar band.

28 GHz Single-Chip Transmit RF Front-End MMIC for Multichannel 5G Wireless Communications

Millimeter-wave wireless networks of the new fifth generation (5G) have become a primary focus in the development of the information and telecommunication industries. It is expected that 5G wireless networks will increase the data rates and reduce network latencies by an order of magnitude, which will create new telecommunication services for all sectors of the economy. New electronic components such as 28 GHz (27.5 to 28.35 GHz) single-chip transmit radio frequency (RF) front-end monolithic microwave integrated circuits (MMICs) will be required for the performance and power consumption of millimeter-wave (mm-wave) 5G communication systems. This component includes a 6-bit digital phase shifter, a driver amplifier and a power amplifier. The output power P3dB and power-added efficiency (PAE) are 29 dBm and 19.2% at 28 GHz. The phase shifter root-mean-square (RMS) phase and gain errors are 3° and 0.6 dB at 28 GHz. The chip dimensions are 4.35 × 4.40 mm.

2-Bit Phase Quantization Using Mixed Polarization-Rotation/Non-Polarization- Rotation Reflection Modes for Beam-Steerable Reflectarrays

We present a new method for achieving 2-bit phase quantization for beam-steerable reflectarrays by exploiting four distinct reflection modes of a unit cell. Two of the four modes perform polarization-rotation (PR) operation while the other two are non-PR modes when the unit cell is illuminated by an $x$ - or $y$ -polarized incident wave. With a specific phase relation between the four reflection modes, the unit cell acts as a 2-bit phase shifter under illumination with an incident wave polarized along a diagonal direction of the square-shaped unit cell. The proposed operating principle was demonstrated with an illustrative unit cell consisting of three metallic layers and using four single-junction connections that can be replaced with single-pole single-throw (SPST) switches for reconfiguration. Simulation results predict an operating bandwidth of about 20% for the unit cell and a good beam scanning performance over a scan range of ±45° for a beam-steerable reflectarray constructed using this unit cell. Two static prototypes of the beam-steerable reflectarray antenna providing beam collimation at two different directions at 10 GHz were fabricated and experimentally characterized. Measurement results show good agreement with the simulation results, validating the proposed design approach for 2-bit reflective unit cells.