24-bit Counter Research Articles

Single Photon-Counting Pixel Readout Chip Operating Up to 1.2 Gcps/mm2 for Digital X-Ray Imaging Systems

This paper presents the design of a PXF40—an ultrafast single photon-counting (SPC) readout front-end electronics implemented in a CMOS 40-nm technology dedicated to hybrid pixel detectors. The prototype application specific integrated circuit core is a matrix of 432 pixels ( $24\times 18$ ) with a $100\,\,\mu \text {m}\times 100\,\,\mu \text{m}$ size. The single processing channel consists of a charge-sensitive amplifier (CSA), a discriminator, and a 24-bit counter with logic circuitry. The input signal is amplified and formed only by the CSA stage. Depending on the CSA input transistor current value, it can operate in two modes: FAST and FAST_HC with higher current. The measured power dissipation per channel $P = 45 \,\,\mu \text{W}$ and noise $\text {ENC} = 212\,\, \text {e}^{-}$ rms for the FAST mode, while $P=100\,\,\mu \text{W}$ and ENC = 185 e− rms for the FAST_HC mode, respectively. The readout chip can count up to 1.2 Gcps/mm2 based on 10% dead-time loss input rate parameter, which is currently the fastest SPC-based solution.

PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed.This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way.The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160fC (1photoelectron-p.e., at PMT gain of 106) to 100pC (around 600p.e.) at 1% of linearity; time tagging at 1ns thanks to a 24-bit counter at 10MHz and a Time to Digital Converter (TDC) on a 100ns ramp.

Subnano time to digital converter implemented in PARISROC for PMm2 R&D program

PARISROC is a complete read out chip, in a BiCMOS SiGe 0.35μm technology from AustriaMicroSystems, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and is part of a R&D program called PMm2. The ASIC integrates 16 independent and auto triggered channels with variable gain and provides charge and time measurement by a 10-bit Wilkinson ADC and a 24-bit counter. The time measurement is made of 2 complementary systems: a 24-bit gray counter (coarse time) with a step of 100 ns, and a double ramp TDC (fine time) with a 10-bit resolution and a measured precision of 425 ps RMS. Only the analog TDC will be explained in this paper by detailing the double ramp TDC architecture, the special cares and the first fine time measurements. One of the fine time TDC characteristics is the fact that the double ramp generator is common to all channels.

Development of a high-rate high-resolution detector for EXAFS experiments

A new detector for EXAFS experiments is being developed. It is based on a multi-element Si sensor and dedicated readout application specific integrated circuit (ASIC). The sensor is composed of 384 pixels, each having 1 mm/sup 2/ area, arranged in four quadrants of 12/spl times/8 elements and it is wire-bonded to 32-channel ASICs. Each channel implements low-noise preamplification with self-adaptive continuous reset, high-order shaper, bandgap referenced baseline stabilizer, one threshold comparator, and two digital-analog converter (DAC) adjustable window comparators, each followed by a 24-bit counter. Fabricated in 0.35 /spl mu/m CMOS, the ASIC dissipates about 8 mW per channel. First measurements show at room temperature a resolution of 14e/sup -/ rms without the detector and 40 e/sup -/ rms (340 eV) with the detector connected and biased. Cooling to -35 C a full width at half maximum (FWHM) of 205 eV (167 eV from electronics) was measured at the Mn-K/spl alpha/ line. A resolution of about 300eV was measured for rates approaching 100 kc/s per channel, corresponding to an overall rate in excess of 10 Mc/s/cm/sup 2/. Channel-to channel threshold dispersion after DAC adjustment 2.5 was e/sup -/ root mean square.

Improved time-base for waveform parameter estimation

An improved gated oscillator time-base and associated auto-calibration algorithm for use in a high-accuracy sampling waveform acquisition system are described. The time-base architecture consists of a stable 100 MHz gated oscillator, 24-bit counter chain, and a clock period interpolator. The nominal, uncorrected linearity of the time-base is approximately /spl plusmn/30 ps. By using an iterative, sine-fit based algorithm, the linearity has been improved to <5 ps. Details of the performance and major sources of error of the time-base and correction algorithm in an equivalent time sampling system are also discussed.

Collection of Auger electron spectra with a microcomputer

This paper describes the principles of the method of electron spectra collection based on the spectrum statistics, and its realization by a microcomputer system developed for electron spectrometer control and for data processing. Electrons passing through the bandpass energy filter are detected as pulses and counted by a 24-bit counter. Another counter collects the pulses of a reference signal; for fixed timing, the reference counter is clocked with an oscillator. Using the total secondary emission current as the reference signal, the emission fluctuations are eliminated and, finally, the signal from a second broader concentric window allows us even to eliminate the background. The measurement of the single spectrum run in any energy interval is governed by the ratio of signal to statistical noise. This value defines the binary order of the reference counter carry signal that stops the signal sample collection. In this way a constant value of signal-to-noise ratio is kept throughout the whole spectrum. The 24-bit sample is then fitted to a 16-bit window according to a preselected value of “sensitivity”. The 16-bit result is stored or accumulated in the “immediate” memory. A reduced 8-bit sample is stored and possibly displayed on a screen. To improve the signal-to-noise ratio, easily-observable fast spectrum runs are accumulated. In this case the microcomputer calculates the new measurement timing so that after the accumulation of 256 runs all bits in the selected dynamical range of measurement are statistically valid. Some results are presented to illustrate the advantages of the microcomputer controlled spectrum accumulation method with measurement time correction. They are compared with single sweep measurements obtainable with classical instruments.