Zero-defect sputter deposition metallization method for high volume manufacturing of grafted multilayer thin film modules

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Such products as multichip modules, stripline filters, and thin-film hybrid circuits typically require the metallization of ceramic-based substrates and subsequent dielectric layers such as polyimides and benzocyclobutene. When dry etching processes are employed for the dielectric layers, an additional metallization step is required to serve as the etch mask. Therefore, the need for a high-volume zero-defect metallization technique is apparent. An inline DC magnetron sputter deposition process that provides such a metallization technique is discussed. High equipment reliability (>99% up-time), low defect levels (<10 ppm), and the use of 12-mm targets allowing the metallization of 3000 ft/sup 2/ between cathode changes has been achieved. The system is configured to provide layered metal systems with discrete or phased interfaces. Plasma optimization via real-time magnetron control and magnetic field suppression at the beginning of target life has enabled deposit thickness (and sheet resistivity) variation to be automatically controlled to +or-5% over the 435-in/sup 2/ deposition area throughout the life of the targets.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>