YOLOv2-tiny Target Detection System Based on FPGA Platform

Abstract

Convolutional neural networks (CNN) are increasingly used for target detection due to the development of deep learning. Currently, most CNNs are predominantly deployed on CPU and GPU platforms. Due to the restrictions of speed and power, it is difficult for the CPU and GPU-based CNN target identification system to match the needs of mobile scenarios. Field Programmable Gate Array (FPGA) may overcome the issues of complex target detection network architecture, extensive computation, and high storage overhead due to its high parallelism and low power consumption. So, an FPGA-based target detection system is designed in this paper. This study examines the network structure and data processing flow of the YOLOv2-Tiny model to lower the system's computing and resource needs by combining layers and employing 16-bit fixed-point quantization. In addition, a dual cache mechanism and a multi-channel transmission design are implemented to improve data storage and transfer. This YOLOv2-Tiny target detection system implemented using MZ7100 FPGA achieves a throughput of 47.33 GOPs at 150 MHz with batch processing while consuming 2.74 W of on-chip power and consumes 26.93 ms to recognize a single image frame. Compared with the Intel Core i5 CPU, the efficiency is 53 times. Although the recognition speed is not as fast as the GPU, the power consumption is significantly reduced, which meets the requirements for target recognition in embedded environments.