Yet an efficient algorithm for computing reduced area VLSI channel routing solutions with floating terminals

Abstract

The main objective of VLSI channel routing problem is to compute a feasible reduced area routing solution which reduces the height of the channel. A channel is a rectangular routing region with two open ends (left and right) and two sets of fixed terminals (top terminals and bottom terminals) are placed in the upper and lower sides of the channel. A net is a set of terminals that need to be electrically connected (usually using rectilinear wiring). Routing is a process to interconnect all nets within the channel considering all constraints (horizontal and vertical constraints) of that channel. The terminals along the left and right ends of the channel are not fixed, known as floating terminals. Generally, channel routing problem for area minimization is NP-complete. So developing a heuristic algorithm is really interesting. In this paper, we consider a general channel routing problem for channel instances with fixed and floating terminals, and develop an efficient graph based heuristic algorithm for reducing area in the reserved two-layer Manhattan channel routing model.