Widening and narrowing of time interval due to single‐event transients in 45 nm vernier‐type TDC

Abstract

Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in sub‐100 nm regime in radiation environment. Time‐to‐digital converter (TDC) is an important electronic component in many fields such as space applications and is used for measuring time precisely as a digital value. In this study, the effect of SET due to radiation strike on 45 nm vernier‐type TDC with a resolution of 7 ps is analysed using cadence spectre circuit simulator. When HI strikes the delay line of TDC close to the START/STOP pulse transition, it either widens or narrows the time interval to be measured, depending on whether it strikes the top/bottom voltage‐controlled delay line (VCDL). Results show that the TDC is sensitive if the SET occurs during the transition of START/STOP pulse. Moreover, the change in the time interval occurs in a regular staircase pattern, if the VCDL is struck at all instants near the pulse transition. These errors lead to erroneous digital output and cause abrupt deviations in the staircase transfer characteristics of TDC. SETs in other constituent components of TDC such as D‐flip‐flop and priority encoder produces glitches which can be mitigated using existing guard gate technique.