Wideband model of on-chip CMOS interconnects using space-mapping technique

Abstract

A new wideband model for on-chip complementary metal–oxide–semiconductor (CMOS) interconnects is developed by virtue of a space-mapping neural network (SMNN) technique. In this approach, two subneural networks are used for improving the reliability and generalization ability of the model. This approach also presents a new methodology for data generation and training of the two neural networks. Two different structures are used for the two subneural networks to address different physical effects. Instead of the S parameters, the admittances of sub-block neural networks are used as optimization targets for training so that different physical effects can be addressed individually. This model is capable of featuring frequency-variant characteristics of radio-frequency interconnects in terms of frequency-independent circuit components with two subneural networks. In comparison with results from rigorous electromagnetic (EM) simulations, this SMNN model can achieve good accuracy with an average error less than 2% up to 40 GHz. Moreover, it has much enhanced learning and generalization capabilities and as fast as equivalent circuit while preserves the accuracy of detailed EM simulations. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2011. © 2011 Wiley Periodicals, Inc.