Abstract
A method to design a wideband, low-loss, and high-current choke inductor suitable for use in a distributed power amplifier (DPA) is presented. The choke inductor is composed of several paralleled low-current inductors with small parasitics placed in a distributed manner. High-frequency gain-limiting parasitic shunt capacitors of these inductors are absorbed by the series inductors already present between the transistor drain terminals of the distributed amplifier. The measurement results of a 2–18-GHz DPA designed using a distributed choke inductor with an equivalent dc resistance of 0.32 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega$</tex-math> </inline-formula> are given.
Published Version
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