Abstract
Highly efficient ESD protection structures with a sustaining voltage >40 V are realized in a smart power technology. They guarantee excellent ESD protection at high voltage pins without the danger of transient latch-up. Compared to the vertical n-p-n transistor, a shift of the sustaining voltage of 20 V has been achieved purely by layout modification of the buried layer. The high ESD performance has been proven at product level by an ESD hardness of >8 kV (HBM).
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