Abstract

The development of silicon technology has been, and will continue to be, driven by system needs. Traditionally, these needs have been satisfied by the increase in transistor density and performance, as suggested by 'Moore's Law" and guided by CMOS scaling theory. As the silicon industry moves towards the 45nm node and beyond, the two most important challenges cited are the growing standby power dissipation and the increasing variability in device characteristics. These complaints are cited as the reason Moore's Law is "broken", or why CMOS scaling is coming to an end. Actually, these effects are the embodiments of CMOS technology's approach to atomistic and quantum-mechanical physics boundaries. However, the infusion of new materials and device structures will extend the development lifetime of silicon CMOS by at least ten years. Cooperative circuit/technology co-design, and architectures developed concurrently with these new device innovations will provide a comprehensive solution to the challenges of deep submicron CMOS

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.