What is statistical design?

Abstract

In the nanoscale regime, the effects of variations can dramatically affect circuit behavior. These variations may arise from fluctuations in the manufacturing process (e.g., drifts in channel length, oxide thickness, threshold voltage, or doping concentration), which affect the circuit yield, as well as variations in the environmental operating conditions (e.g., supply voltage, temperatures, or particle strikes that lead to soft errors) after the circuit is manufactured, which affect the correctness of the behavior of the design. Some of these variations are entirely deterministic (metal fill density, etc.), while others are random, as their cause is either unknown, or unattributable, or too difficult to model.Circuit performance is known to vary significantly under process and environmental variations: significant changes in timing can result, and the leakage power, which depends exponentially on process parameters, can be greatly affected. Unlike traditional deterministic analysis, where performance values at worst-case process/voltage/temperature corners are computed, statistical analysis determines the probability distributions for the timing or the power.Practical statistical static timing analysis (SSTA) methods proceed in a block-based manner in the fashion of deterministic STA algorithms, and use determine the probability distributions of the arrival time at the gate outputs, while statistical leakage power analysis techniques use probabilistic methods to determine the distribution of the leakage. The performance yield can be computed by using these distributions to determine the fraction of manufactured circuits that satisfy timing and power constraints. Statistical optimization changes the design parameters of the circuit to improve the performance yield.