Abstract
The article provides a method of building the sum code, that detects any errors of double multiplicity in data vectors. This characteristic can be effectively used for organizing the concurrent error detection (CED) systems of combinational logic circuits. The paper explains new sum code characteristics, and also states the properties of this code for error detection in data vectors. Also there is a comparison of a new sum code with the classic Hamming code, also having this characteristic to detect any double errors. Theoretical results are complemented with experimental studies with the system of check combinational circuits MCNC Benchmarks.
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