Abstract
We propose a novel approach for monitoring the wafer-level plasma-induced charging effect in advanced CMOS fin-shaped field effect transistor (FinFET) processes, and successfully demonstrate that ON-chip charge collectors, consisting of antenna-coupled floating gates (FGs), can record the plasma charging levels during back-end-of-the-line processes. The charge stored on these in situ recorders helps to project the actual potential on the transistor gates during plasma-charging stress. Wafer maps containing the potential distribution, as estimated by the level of positive and negative charging effects on the FGs, provide a powerful tool for future FinFET process optimization and yield additional insights for device reliability analysis.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
