Abstract
Wafer Level Reliability test techniques can be used to provide fast feedback process control information regarding the reliability of the product of a semiconductor process. The purpose of wafer level reliability (WLR) tests is the measurement of variation in the materials comprising the semiconductor device. They are not intended as modeling tools for the quantification of the effect of stress on these materials. As such, WLR tests must provide a repeatable stress, independent of normal process variation. The results of these tests will be a measurement of the “rate of degradation” of the basic circuit elements caused by a standard stress.
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