Wafer bonding involving strain-relaxed SiGe

Abstract

Wafer bonding of strained silicon (sSi) layer to oxidized Si (0 0 1) handle wafers is described in this paper. The sSi resides on two types of relaxed SiGe layers, a thick one (2 μm in thickness) grown on top of a compositionally graded buffer and a thin one (∼180 nm) for which He implantation and annealing are used to induce plastic strain relaxation by misfit dislocations. The thick SiGe layer shows a pronounced cross-hatch pattern resulting in a high surface micro-roughness (>1 nm). For direct bonding this roughness is reduced to <1 nm by the deposition of a chemical vapor deposition (CVD) silicon oxide followed by chemo-mechanical polishing (CMP). An outgassing process at 600 °C for 1 h in argon atmosphere was needed for the deposited CVD oxide prior to wafer bonding. Spontaneous and void-free bonded interfaces were obtained when both types of substrates were brought in contact with the oxidized handle wafers at room temperature. The bonding energies obtained after annealing at moderate temperatures (e.g. 500 °C) are sufficiently high to withstand further processing involved in layer transfer.