Abstract
This article presents the improved formulations for the latency insertion method (LIM) for diodes and MOSFETs utilizing the voltage-in-current framework. LIM is a fast circuit simulation algorithm, which computes the solutions to the voltages and currents in a circuit in a leapfrog manner, instead of a simultaneous matrix solution typically performed in the modified nodal analysis formalism. This allows LIM to have a far superior scaling with respect to the dimensions of the circuit. The formulations presented here have the advantage of not being limited by the stability condition in LIM and thus allow the simulations to be performed at larger time steps. Numerical examples are presented, which illustrate the improved performances of the developed formulations.
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