Virtual scan chains reordering using a RAM-based module for high test compression

Abstract

Scan chain reordering could be used for test compression by making the corresponding test set more easily compressed. However, it may adversely affect scan chain routing by creating very long routing path and modifying signal delays. The paper proposes a virtual scan chain reorder technique which targets on test compression. The approach simply uses a RAM-based module to control the orders of scan cells in circuits. To achieve high test compression, the scan cells can be virtually arranged into any order for different compression schemes. It does not do any real modification to scan chains, and has no any scan chain routing costs. Experimental results show that the proposed method can raise the compression ratio efficiently.