VIP-VP: Early Validation of SoCs Information Flow Policies using SystemC-based Virtual Prototypes

Abstract

The emergence of Virtual Prototypes (VPs) at the Electronic System Level (ESL) has played a major role in modernizing the System-on-Chips (SoCs) design flow to raise design productivity and reduce time-to-market constraint. Leveraging VPs and extending their use-cases for early security validation are shown as a promising direction. As the cost of fixing any security flaws increases with the stage of development, VP-based security validation can significantly avoid costly iterations. In this paper, we propose VIP-VP, a novel VP-based dynamic information flow analysis approach at the ESL.VIP-VP enables designers to validate the information flow policies of a given VP-based SoC against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity). Experimental results including a real-world VP-based SoC demonstrate the scalability and applicability of the proposed approach.