Application II: Security Validation

Abstract

Modern SoCs are notoriously insecure. Hence, the fundamental security feature of IP isolation is heavily used, e.g., secured Memory Mapped IOs (MMIOs), or secured address ranges in case of memories, are marked as non-accessible. One way to provide reliable assurance of security is to define isolation as information flow policy in hardware using the notion of non-interference. Since insecure hardware opens up the door for attacks across the entire system stack (from software down to hardware), the security validation process should start as early as possible in the SoC design cycle, i.e., at the ESL. In this chapter, we show another application of the design understanding in the design process for the task of security validation at the ESL. We take advantage of the introduced VP analysis approaches in Chap. 3 to perform a dynamic information flow tracking analysis to access the run-time behavior of a given VP-based SoC. The extracted behavior is validated against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity).