Very Low-Voltage Switched-Current Circuits in Standard Digital CMOS Process

Abstract

The inherent simplicity of switched-current circuits makes them suitable for low-voltage and very low voltage operation. This paper presents the design of 1.2-V switched-current circuits in a standard digital CMOS process. The core elements are the proposed fully differential SI memory cell and high resolution current quantizer. A delay line and a second-order delta-sigma modulator are implemented and measured. The delay line occupies an active chip area of 0.2 mm^2 and dissipates a power of 0.2 mW, and the modulator occupies an active chip area of 0.47 mm^2 and dissipates a power of 0.78 mW. The measured total harmonic distortion of the delay line is less than −48 dB with a 60% input modulation index and the measured dynamic range of the modulator is 10 bits.