Verification of Device Model by Measuring Capacitance and Static Characteristics for Predicting Switching Waveform

Abstract

Recently, as the miniaturization and densification of the power conversion circuit, switching frequency has been increased. To accomplish the densification, it is essential to predict the losses that occur in each part for the optimization of electric components. However, switching loss which needs to consider nonlinear characteristics are difficult to predict. As a solution, considering the dependence of the gate-drain capacitance on gate-source voltage may improve the prediction accuracy of switching loss. The purpose of this study is to evaluate the improvement of prediction accuracy by considering it. First, to construct the simulation model, the wiring parameter in the circuit, static characteristics and the parasitic capacitance of the device was measured. Next, the device model provided by the manufacturer to use in the simulation was adjusted. Also, the characteristics of the gate-drain capacitance on the gate-source voltage were obtained from two types of measurement circuits. As a result, it was verified that the difference which occurred at the rise of the drain-source voltage at the turn-off tended to decrease and prediction accuracy of the turn-off loss was improved by considering the characteristics of the gate-drain capacitance on the gate-source voltage. Therefore, we concluded that this consideration has the ability to the improvement of turn-off waveforms.