Vector Computer Architecture and Processing Techniques

Abstract

Publisher Summary Vector- or array-processing computers are essentially designed to maximize the concurrent activities inside a computer and to match the bandwidth of data flow to the execution speed of various subsystems within a computer. This chapter reviews architectural advances in vector-processing computers. It describes the two major classes of vector machines—namely, the pipeline computers and array processors. Problems associated with designing pipeline computers are also presented with examples from the Texas Instruments Advanced Scientific Computer (TI-ASC), Control Data STring ARay (STAR-100) and CYBER-205 Computers, Cray Research CRAY-1, and Floating-Point Systems AP-120B. The chapter describes the architectures of recently developed SIMD array processors. Further, it examines the development experiences of the Burroughs Scientific Processor (BSP) and the Goodyear Aerospace Massively Parallel Processor (MPP). Recent research works on array and pipeline processors are also summarized. The chapter concludes with the evaluation of the performance of pipeline and array processors and explores various optimization techniques for vector operations. Hardware, software, and algorithmic issues of vector-processing systems and future trends of vector computers are also discussed.