Abstract

Adaptive routing proves its efficiency in sustaining higher network performance bypassing packets through alternate congestion-free minimal or non-minimal routes for a many-core on-chip communication system. It prevents the network from reaching an early saturation due to the stalling of packets in the priority-fixed shortest route for a longer period. However, routing packets adaptively to an alternate route instead of choosing the priority-fixed and shortest route may lead to an unintended state of delivering packets out-of-order sequence at the destination node that is not accepted by many message-passing systems. This ordering mismatch is due to allowing multiple alternate routes for packets of the same communication flow in adaptive mode. In such a case, a packet with a higher sequence number takes over another packet of the same communication flow having a lower sequence number. Storing and reordering all unordered packets of the same communication flow at the sink side becomes costlier due to the increasing area and power requirement. Ideally, the added memory size reaches to infinity for storing all unordered packets that belong to the same communication flow. In the proposed method, we guarantee delivery of all packets belongs to the same communication flow in an orderly manner under adaptive routing mode. In particular, we have proposed a flow-control policy based on a virtual circuit switch (VCS) method that exclusively won and reserve a virtual path for routing packets in an adaptive mode for each communication flow. To maximize network performance, we allow sharing of the reserved path among packets of different communication flows, routing under priority fix deterministic mode. The method saves need of having additional memory unit for storing all unordered packets while guaranteeing the packet’s ordering sequence at the destination end. An experiment conducted on two different size Mesh networks (8x8 and 12x12) under several synthetic traffic and benchmark application reveals that our virtual circuit switching (VCS) based proposed method offers a significant improvement over the state-of-the-art packet reordering method (ROR) and two similar type of research works. Our simulation based experimental result shows that method offers a 60% higher saturation point and 21% improvements (maximum) in throughput while offering a reduction of 60% in NoC area and 58% power value compared to the baseline reorder (ROR) method.

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