Abstract
The Boltzmann distribution of electrons sets a fundamental barrier to lowering energy consumption in metal-oxide-semiconductor field-effect transistors (MOSFETs). Negative capacitance FET (NC-FET), as an emerging FET architecture, is promising to overcome this thermionic limit and build ultra-low-power consuming electronics. Here, we demonstrate steep-slope NC-FETs based on two-dimensional molybdenum disulfide and CuInP2S6 (CIPS) van der Waals (vdW) heterostructure. The vdW NC-FET provides an average subthreshold swing (SS) less than the Boltzmann’s limit for over seven decades of drain current, with a minimum SS of 28 mV dec−1. Negligible hysteresis is achieved in NC-FETs with the thickness of CIPS less than 20 nm. A voltage gain of 24 is measured for vdW NC-FET logic inverter. Flexible vdW NC-FET is further demonstrated with sub-60 mV dec−1 switching characteristics under the bending radius down to 3.8 mm. These results demonstrate the great potential of vdW NC-FET for ultra-low-power and flexible applications.
Highlights
The Boltzmann distribution of electrons sets a fundamental barrier to lowering energy consumption in metal-oxide-semiconductor field-effect transistors (MOSFETs)
The schematic structure of a CIPS/MoS2 van der Waals (vdW) Negative capacitance FET (NC-FET) is shown in Fig. 1a, consisting of a few-layer MoS2 as the channel material, CIPS flake and 285 nm-thick SiO2 as the top Negative capacitance (NC) and back MOS gate dielectric, respectively, heavily doped silicon substrate as the MOS gate electrode and Cr/Au as the NC gate electrode and source/ drain contacts
The cross-sectional transmission electron microscope (TEM) image in Fig. 1c shows the layered structure of a typical vdW ferroelectric/semiconductor heterostructure created with atomically flat CIPS and MoS2 flakes via the dry transfer process[27] (Supplementary Note 1 and Supplementary Fig. 2)
Summary
The Boltzmann distribution of electrons sets a fundamental barrier to lowering energy consumption in metal-oxide-semiconductor field-effect transistors (MOSFETs). Negative capacitance (NC) fieldeffect transistor (NC-FET) has been proposed as one of the promising candidates beyond complementary metal-oxidesemiconductor (CMOS) device that may overcome the thermionic limit of 60 mV dec−1 by the internal amplification of gate voltage through ferroelectric materials[3,4,5,6,7]. Owing to their atomically thin body nature, two-dimensional (2D) transition metal dichalcogenides (TMDs) have been demonstrated to provide superior immunity to short-channel-effects[8,9,10,11] and suggested to achieve steep subthreshold slope over a wide voltage range for the NC-FET12–14. Bending tests show that sub-60 mV dec −1 SS can be retained and hysteresis alleviated for vdW NC-FET on polyester substrate under a bending radius down to 3.8 mm, benefiting from the intrinsic high flexibility and stretchability of 2D materials
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