Abstract
Presented is a system combining the validation of algorithmic and RT hardware models with test pattern generation for production test. The used validation techniques are based on simulations of test executions on the modeled hardware. Therefor the system includes tools automatically determining the quality of executed tests for validation and evaluating results of simulation runs. The test pattern generation is similar to Levendels and Menons technique /1/, however it intensively uses presupposed controllability and observability as for instance guaranteed by a scan path. It is integrated into the validation tools and thoroughly utilizes the data they produce. So this test pattern generation causes only neglectable additional costs. An experimental application of the system produced good results.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.