Vacuum Reflow Process Optimization for Solder Void Size Reduction in Semiconductor Packaging Assembly

Abstract

The undesirable impacts of solder void defects on the reliability of die packages have prompted stringent requirements on solder void size control in the semiconductor packaging industry. Vacuum reflow process using Pb95Sn5 solder was studied, where critical process parameters within temperature and pressure profiles were varied for enhanced solder void size reduction, in comparison to conventional reflow process. Higher reflow temperature profile, faster pressure pump-down rate, and longer vacuum dwell time above threshold levels are critical conditions required for consistently achieving minimum solder void sizes well below the industry criteria. Application of threshold conditions using large volume reflow oven with industrial settings has achieved the single and the total solder void size over die size well below the standard 2.5% and 5% requirements, respectively, with majority of the samples attained the single and the total solder void size over die size below 1% and 2%, respectively. Solder bond line thickness exhibited a significant influence on the solder void size reduction and thus needs to be administered appropriately during die packaging assembly to achieve the maximum solder void size reduction.