Using www.sigma-delta.de to rapidly obtain ELD compensated CT ΣΔ modulators

Abstract

For two decades, Excess-Loop-Delay (ELD) is known to degrade the performance of continuous-time (CT) ΣΔ A/D converters. Many methods have been proposed to compensate for this effect, but for their implementation sophisticated knowledge in loop-filter design is necessary. The web-based design tool for CT ΣΔ modulators www.sigma-delta.de offers a straightforward integration of commonly used ELD compensation techniques in an early stage of the design process without the need of in depth knowledge of ΣΔ loop-filters. As the tool uses a heuristic search, based on a genetic algorithm within a parallel implementation on a GPU, it provides results with a very short response time. This paper presents the compensation techniques which are commonly implemented within the state of the art and shows their automatic application on architectural level by the design tool. Exemplary modulators are created and evaluated in a circuit level simulator. Further, the calculation of device parameters for a circuit-level simulator model, based on the coefficients obtained by the tool, is illustrated. Thereby, the usage of the developed and publicly available design tool for CT ΣΔ modulator is practically shown.