Using Wafer Scale Optical Profilometry to Estimate the Failure Rate of Vertical Pin GaN Diodes

Abstract

GaN research is important to the development of next generation power conversion technology, for SiC based devices are limited to 13 kV loads, while GaN could theoretically handle 20 kV. Presently, commercialized GaN technology using lateral High Mobility Electron Transistors (HEMTs); however, vertical GaN devices could have 3 times larger critical electric field and a five order of magnitude lower dislocation density. Current GaN substrate manufacturing technology is known to produce inconsistent quality with a varying concentration of defects. These defects are known to cause catastrophic device failure, thus there is motive to develop quick, non-destructive techniques to predict the quality of the wafer before undergoing the expensive fabrication process. Our previous research [1,2], has studied several techniques to predict the quality of devices, and has correlated device quality to Raman spectroscopy data. This talk focuses on using optical profilometry data.Optical profilometry is a non-destructive technique capable of mapping the surface morphology of a whole wafer in a few hours. Since defects in the thin film or epitaxial layer often manifest themselves as abnormalities on the surface, this technique can be used to determine the regions of the sample where devices will fail. Dividing the samples into sub-regions, a generalized extreme studentized deviant test can be used to detect where outliers, which are likely defects, occur. From this, the location of the defects can be mapped and the probability of a devices landing on a defect can be calculated. Additionally, by knowing the location of the defects, they can be avoided thus increasing the device yield.This work was supported by the Office of Naval Research and ARPA-E OPEN+ Kilovolt Devices Cohort directed by Isik Kizilyalli.[1] J.C. Gallagher, T.J. Anderson, A.D. Koehler, M.A. Ebrish, G.M. Foster, M.A. Mastro, J.K. Hite, B.P. Gunning, R.J. Kaplar, K.D. Hobart, F.J. Kub, Effect of GaN Substrate Properties on Vertical GaN PiN Diode Electrical Performance, J. Electron. Mater. (2021). doi:10.1007/s11664-021-08840-9.[2] J.C. Gallagher, T.J. Anderson, L.E. Luna, A.D. Koehler, J.K. Hite, N.A. Mahadik, K.D. Hobart, F.J. Kub, Long range, non-destructive characterization of GaN substrates for power devices, J. Cryst. Growth. 506 (2019) 178–184. doi:10.1016/j.jcrysgro.2018.10.032.