Using the models of incompletely specified Boolean functions in the synthesis of schemes by VHDL descriptions

Abstract

It is proposed to replace certain VHDL designs by functional models of not completely determined Boolean functions and systems of such functions. It is shown that the optimization transformations of such models make it possible to develop more rapidly acting logical circuits, in many cases as a result of the automated synthesis compared to the circuitry implementation of starting VHDL designs. The results of the corresponding experiments are presented.