Using iMTGSPICE to Optimize Cascaded Miller OTAs and Boost Electrical Performance, Robustness and Reduce Die Area

Abstract

Analog designers usually cascade several basic analog building blocks that were previously optimized to increase the open-loop voltage gain (AV0) and to avoid the increasing of the Design and Optimization Cycle Time (DOCT) of a given System-On-a-Chip. However, still exist a big doubt about if this approach is really better than that considering the implementation of amplifiers in cascade, without considering previously optimized analog building blocks. Thus, the main objective of this paper is to perform a detailed comparative study between robust amplifiers in cascade implemented without using analog building blocks previously designed and optimized and a similar one that uses analog building blocks previously designed and optimized (typical design approach). The computational design and optimization tool, named iMTGSPICE, which uses heuristics algorithms of the Artificial Intelligence integrated to the expertise of the analog designers (Human Intelligence), is used to perform these implementations to remarkably reduce DOCT of these implementations. This work demonstrates that it is possible to reduce the total gate area (44.6%) and to increase the operating temperature range from 0oC to 36oC to -40oC to 125oC of the robust amplifier in cascade that was implemented without using analog building blocks previously designed and optimized compared to one that was implemented by using analog building blocks previously designed and optimized.