Abstract

Reliable multilevel resistive switching in nanoscale cells is desirable for the wide adoption of resistive random access memory as the next-generation nonvolatile memory. We designed NiO-based cells in arrays of multilayered NiO/Pt nanowires to explore multilevel memory effects. Nonpolar resistive switching reproducibly occurs with significantly reduced switching voltages, narrow switching voltage distributions and a robust multilevel memory effect. A high resistance ratio (∼105) between the high- and low-resistance states in nanoscale cells enables stable multilevels that can be induced easily by a series of pulsed voltage. The existence of intermediate resistance states in NiO/Pt nanowire arrays can be well explained by the binary-resistor model combined with energy perturbations induced by the pulse voltage. We also verified that the conduction mechanism in multilayered NiO/Pt nanowires is dominated by the hopping of holes. Our bottom-up approach and proposed mechanism explain the controllable multilevel memory effect and facilitate sound device design to encourage their universal adoption. Metal-insulator-metal structures that can switch between low and high resistance states under electrical stimulus hold promise as components for future non-volatile memory devices. A Taiwan-based research team, led by Chih-Huang Lai at the National Tsing Hua University, has now devised a nanowire array that exhibits multilevel resistive switching behavior — that is, between low, high and also intermediate states — under voltage pulses, giving rise to robust memory effects. Each nanowire consists of multilayered, alternating nickel oxide and platinum parts, and the multilevel resistive switching phenomenon is attributed to averaging over all possible binary configurations for each nickel oxide segment in the multilayered nanowire array. The researchers explain these observations using a binary resistor model of conduction generated by the hopping of holes through defects, which may be applicable to other multilevel resistive switching systems. Nonpolar resistive switching reproducibly occurs in arrays of nanoscale cells composed of multilayered NiO/Pt nanowires with significantly reduced switching voltages, narrow switching voltage distributions and a robust multilevel memory effect. A high resistance ratio (∼105) between the high- and low-resistance states in nanoscale cells enables stable multilevels to be induced easily by a series of pulsed voltages. The existence of intermediate resistance states in NiO/Pt nanowire arrays can be well explained by the binary-resistor model combined with energy perturbations induced by the pulse voltage. Our bottom-up approach and proposed mechanism explain the controllable multilevel memory effect.

Highlights

  • Utilizing resistive switching between a low-resistance state (LRS) and high-resistance state (HRS), resistive random access memory serves as a potential alternative to the current flash memory for ultrahigh-density storage

  • Resistive switching has been observed in various transition metal oxides,[4,5,6,7,8,9,10,11,12,13] the microscopic mechanism is not yet fully understood, which may limit its use in the integrated circuit industry

  • A pore diameter of 70 nm and interpore distances of 90 nm were obtained with as-made well-ordered anodic aluminum oxide (AAO) templates that defined the diameter of nanowires and the number of nanowires connected in parallel under a single Pt electrode

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Summary

Introduction

Resistive random access memory has attracted considerable attention as a promising candidate for the next-generation nonvolatile memory because of its excellent memory characteristics, which are superior to existing memory technologies.[1,2,3] Utilizing resistive switching between a low-resistance state (LRS) and high-resistance state (HRS), resistive random access memory serves as a potential alternative to the current flash memory for ultrahigh-density storage. Using binary resistors to achieve multilevel resistive switching in multilayer NiO/Pt nanowire arrays

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