Abstract

For SOC devices, it is sometimes required to route high frequency analog signals (>10MHz) to the device under test (DUT). It is common to use an analog signal generator within the test system to provide these signals. However, production test systems for such devices often contain many more digital pins than analog signal generators. Therefore, it is advantageous to utilize the digital pins whenever possible in order to leave the analog resources available for other needs. This work reports how a digital channel (pin) of an SOC test system can be used, leaving the analog signal source available for other purposes. This solution may be used to provide something as simple as a clock pulse or a filtered CW tone. One common need for a high frequency analog signal is when supplying the DUT with an analog reference clock signal for the phase-locked looped functionality within the DUT. This low-level sinusoidal-like signal must be extremely stable with low phase noise. One of the most critical items of concern in these applications is the phase noise of the signal.

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