An integration of memory-based analog signal generation into current DFT architectures

Abstract

One method for the testing of mixed analog/digital integrated circuits involves the digital encoding of analog signals into an aperiodic pulse-density modulated (PDM) serial bit stream and using it to stimulate a device under test (DUT). This paper describes a method for obtaining a short periodic approximation of the PDM pattern and identifies two methods of integrating this analog test scheme into the current digital test environment: RAM- and scan-based storage. Using such design-for-test logic as the 1149.1-1990 JTAG architecture and a typical RAMBIST controller, these analog signal generation techniques can be added to digital integrated circuits (IC's) with minimal additional hardware overhead.