Abstract
Many potential applications of porous silicon nanowires (SiNWs) fabricated with metal-assisted chemical etching are highly dependent on the precise control of morphology for device optimization. However, the effects of key etching parameters, such as the amount of deposited metal catalyst, HF–oxidant molar ratio (χ), and solvent concentration, on the morphology and etching kinetics of the SiNWs still have not been fully explored. Here, the changes in the nanostructure and etch rate of degenerately doped p-type silicon in a HF–H2O2–H2O etching system with electrolessly deposited silver catalyst are systematically investigated. The surface morphology is found to evolve from a microporous and cratered structure to a uniform array of SiNWs at sufficiently high χ values. The etch rates at the nanostructure base and tip are correlated with the primary etching induced by Ag and the secondary etching induced by metal ions and diffused holes, respectively. The H2O concentration also affects the χ window where SiNWs form and the etch rates, mainly by modulating the reactant dilution and diffusion rate. By controlling the secondary etching and reactant diffusion via χ and H2O concentration, respectively, the fabrication of highly doped SiNWs with independent control of porosity from length is successfully demonstrated, which can be potentially utilized to improve the performance of SiNW-based devices.
Highlights
Despite research breakthroughs on various novel materials, silicon remains one of the most attractive substrates for fabricating nanostructures because of its abundance in nature and the existence of well-developed techniques for device integration
Silicon nanowire (SiNW) which had almost no defects were obtained with a Ag deposition time of 4 min (Fig. 2b), with higher deposition times resulting in pit-free SiNWs
Porous SiNWs were fabricated from degenerately doped ptype Si substrates using metal-assisted chemical etching in HF–H2O2 with electrolessly deposited Ag catalyst
Summary
Despite research breakthroughs on various novel materials, silicon remains one of the most attractive substrates for fabricating nanostructures because of its abundance in nature and the existence of well-developed techniques for device integration. Relatively porous SiNWs can be obtained with low-doped Si wafers by utilizing high oxidant concentrations in the etchant [15], the use of highly doped Si is advantageous where high electrical conductivity is necessary as it obviates the need for a post-etch doping step. This is especially true in thermoelectric applications of porous SiNWs where the boost in the figure of merit is due to the decrease in thermal conductivity without significant degradation of electrical conductivity [27]. It has been reported that the resistance of porous SiNWs is rather large compared to that of solid SiNWs [14], implying a tradeoff between degree of porosity and electrical conductivity
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