Abstract
Unexpected device interactions between ESD diodes and NMOS clamps in isolated P-well (triple well) have been observed. This can lead to an SCR-like $I$ – $V$ behavior in TLP measurements and poses a latch-up risk. The cause of this interaction is being analyzed using equivalent circuits with parasitic devices and by TCAD simulations.
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Schedule a callMore From: IEEE transactions on device and materials reliability : a publication of the IEEE Electron Devices Society and the IEEE Reliability Society
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