Understanding the Impact of Extension Region on Stacked Nanosheet FET: Analog Design Perspective

Abstract

This work incorporates an in-depth physics-based investigation of Nanosheet FET’s (NSFET’s) extension region for analog circuit design. When extension length (LEXT) is changed from 8 nm to 3 nm, the NSFET exhibits an increment in IOFF (∼8×) and subthreshold swing ‘SS’ (∼5mV/dec), with a ∼1.5× enhancement in ION. Though driving capacity does not increase proportionally on stacking the sheets owing to the location of contacts, however the ION/IOFF ratio increases by ∼ 10× on stacking two more sheets. A common source (CS) amplifier is utilized for the analysis of the circuit-level performance. The gain-bandwidth profile is worth highlighting that the extension region gives feasibility to modulate the gain and bandwidth of the amplifier as compared to sheet stacking. It is investigated that a higher extension length (8 nm) gives a ∼27% higher gain, while a lower LEXT (3 nm) gives ∼2× higher bandwidth. Though sheet stacking increases the ON current, it does not significantly impact the gain, bandwidth, or phase shift.