Abstract

Aggressive CMOS scaling and device performance enhancement is pursued thgrough the use of advanced dielectric and substrate materials. High-k dielectric materials are the key to both dramatically reduce the standby leakage current (and thus power consumption) and to enable the use of high mobility substrates. Critical for device performance and reliability are both the interface quality and bulk defect control. The most important question for high-k materials is always: "How many defects can we allow in these materials and how these are going to influence the performance observed and the reliability?" This paper addresses these issues by looking at both the current understanding of defects in advanced materials for performance and reliability.

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