Abstract

A new method is presented for high-dimensional variability analysis based on two main concepts, namely, node tearing for parameter partitioning and sparse grid interpolation. Node tearing is used to localize the parameters and, thus, reducing the number of stochastic parameters within the subcircuits and sparse grids reduce the required number of samples for a targeted accuracy. MC analysis of the overall circuit is carried out using interface equations of a much smaller dimension than the original circuit equations. Pertinent computational results are presented to validate the efficiency and accuracy of the proposed method.

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