Abstract
There is a continuous demand to reduce the size of the devices that form a unit circuit, such as logic gates and memory, to reduce their footprint and increase device integration. In order to achieve a highly efficient circuit architecture, optimizations need to be made in terms of device processing. However, the time involved in the current reduction of device sizes according to Moore’s Law has slowed down. Here, we propose a flexible transistor with ultra-thin IGZO (InGaZnO, indium-gallium-zinc-oxide) as the channel material, which not only scales down the footprints of multi-transistor logic gates but also combines the functions of the logic gates, memory, and sensors into a single cell. The transistor proposed here has an ultrathin semiconductor layer and can implement the typical functions of logic gates that conventionally have 2–6 transistors. Furthermore, it demonstrates the memory effect with a programming time as low as 5 ns. This design can also display various artificial synaptic behaviors. This new device design and structure can be adopted for the development of next-generation flexible electronics that require higher integration.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.