Abstract

Silicon photonics is becoming the leading technology in photonics for a variety of new applications. However, due to the large volume and high cost of traditional optical devices, they are not suitable for high integration. It is challenging to further improve the integration and performance of silicon photonics. Here, we proposed a power splitter designed by inverse design algorithm has high transmission efficiency and compact structure size, which is helpful to the integration of photonic integrated circuit (PIC). The emergence of inverse design algorithm makes a great breakthrough in the problems existing in optical devices. In recent years, inverse design algorithms have attracted researchers' attention because of their ability to regulate light transmission by changing the refractive index distribution in the subwavelength structure. Direct-binary-search (DBS) algorithm, as the most commonly used inverse design algorithm, is applied to the design of on-chip photonic devices because of its simple working principle and high optimization efficiency. As one of the important components of photonic integrated circuits, on-chip power splitter plays an important role in optical communication system. Power splitters which can achieve any power ratio are widely used in optical interconnect devices. The traditional arbitrary power splitter can achieve different split ratios through different structures, but they can not achieve controllable split ratios in the same device, which is an obstacle to the integration of PIC. Phase change materials have been widely used in controllable photonic devices due to their unique optical properties. We combined the DBS algorithm to program and control the Ge<sub>2</sub>Sb<sub>2</sub>Se<sub>4</sub>Te<sub>1</sub> (GSST), divided the whole device into multiple units, and optimized the design of each unit. Finally, the phase distribution in line with the target splitting ratio was obtained, and the high-efficiency and small-size power distributor was realized. A 3D finite-difference time-domain (FDTD) solution was used to simulate the device, and the TE<sub>0</sub> mode light from the input waveguide was transmitted through the coupling region to the upper and lower output waveguides. Simulation results show that the device size is only 2.4 × 2.4 um<sup>2</sup>, and in the wavelength range of 1530 nm-1560 nm, the power split ratio of 1:1.5 and 1:2.5 is achieved. This method is helpful for the development of programmable integrated photonic interconnect devices.

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