Ultra-Compact Imprecise 4:2 Compressor and Multiplier Circuits for Approximate Computing in Deep Nanoscale

Abstract

Due to the advancement of technology and the reduction in chip dimensions to achieve circuits with lower energy consumption, the design of fast integrated circuits with low power consumption has become very important. Approximate computing is one of the most attractive paradigms for reducing energy dissipation. In this article, a hybrid approximate 4:2 compressor and an imprecise multiplier with high speed and low power consumption are proposed. The suggested compressor has a very simple structure while providing an acceptable quality. The innovative design approach of the suggested hybrid approximate compressor simplifies the structure of the proposed imprecise multiplier and makes an excellent trade-off between energy efficiency and quality. The proposed designs are simulated using HSPICE with 7-nm FinFET technology. The simulation results indicate the superiority of the proposed approach regarding various performance parameters compared to the state-of-the-art counterparts. The hybrid compressor improves delay, power, power-delay product (PDP), energy-delay product (EDP), and transistor count on average by 35%, 67%, 77%, 83%, and 67%, respectively, compared to the other compressors. Furthermore, these improvements are 55%, 64%, 84%, 92%, and 60%, respectively, compared to the other approximate multipliers.